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Merge changes from topic "refactor_prepare_dtb" into integration

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* changes:
  refactor(zynqmp): use common code for prepare_dtb
  refactor(xilinx): remove multiple return paths in prepare_dtb
This commit is contained in:
Joanna Farley 2023-10-09 11:16:26 +02:00 • committed by TrustedFirmware Code Review
commit b06b509eb2
3 changed files with 67 additions and 88 deletions
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107
plat/xilinx/common/plat_fdt.c
View file

@ -15,61 +15,84 @@
void prepare_dtb(void)
{
#if defined(XILINX_OF_BOARD_DTB_ADDR)
void *dtb;
int ret;
#if !defined(XILINX_OF_BOARD_DTB_ADDR)
return;
#else
int map_ret = 0;
int ret = 0;
dtb = (void *)XILINX_OF_BOARD_DTB_ADDR;
#endif
if (IS_TFA_IN_OCM(BL31_BASE))
return;
if (!IS_TFA_IN_OCM(BL31_BASE)) {
#if defined(PLAT_XLAT_TABLES_DYNAMIC)
ret = mmap_add_dynamic_region((unsigned long long)dtb,
(uintptr_t)dtb,
XILINX_OF_BOARD_DTB_MAX_SIZE,
MT_MEMORY | MT_RW | MT_NS);
if (ret != 0) {
WARN("Failed to add dynamic region for dtb: error %d\n", ret);
return;
}
map_ret = mmap_add_dynamic_region((unsigned long long)dtb,
(uintptr_t)dtb,
XILINX_OF_BOARD_DTB_MAX_SIZE,
MT_MEMORY | MT_RW | MT_NS);
if (map_ret != 0) {
WARN("Failed to add dynamic region for dtb: error %d\n",
map_ret);
}
#endif
/* Return if no device tree is detected */
if (fdt_check_header(dtb) != 0) {
NOTICE("Can't read DT at %p\n", dtb);
return;
}
if (!map_ret) {
/* Return if no device tree is detected */
if (fdt_check_header(dtb) != 0) {
NOTICE("Can't read DT at %p\n", dtb);
} else {
ret = fdt_open_into(dtb, dtb, XILINX_OF_BOARD_DTB_MAX_SIZE);
ret = fdt_open_into(dtb, dtb, XILINX_OF_BOARD_DTB_MAX_SIZE);
if (ret < 0) {
ERROR("Invalid Device Tree at %p: error %d\n", dtb, ret);
return;
}
if (ret < 0) {
ERROR("Invalid Device Tree at %p: error %d\n",
dtb, ret);
} else {
/* Reserve memory used by Trusted Firmware. */
if (fdt_add_reserved_memory(dtb, "tf-a", BL31_BASE, BL31_LIMIT - BL31_BASE)) {
WARN("Failed to add reserved memory nodes for BL31 to DT.\n");
return;
}
if (dt_add_psci_node(dtb)) {
WARN("Failed to add PSCI Device Tree node\n");
}
ret = fdt_pack(dtb);
if (ret < 0) {
ERROR("Failed to pack Device Tree at %p: error %d\n", dtb, ret);
return;
}
if (dt_add_psci_cpu_enable_methods(dtb)) {
WARN("Failed to add PSCI cpu enable methods in DT\n");
}
/* Reserve memory used by Trusted Firmware. */
ret = fdt_add_reserved_memory(dtb,
"tf-a",
BL31_BASE,
BL31_LIMIT
-
BL31_BASE);
if (ret < 0) {
WARN("Failed to add reserved memory nodes for BL31 to DT.\n");
}
ret = fdt_pack(dtb);
if (ret < 0) {
WARN("Failed to pack dtb at %p: error %d\n",
dtb, ret);
}
flush_dcache_range((uintptr_t)dtb,
fdt_blob_size(dtb));
INFO("Changed device tree to advertise PSCI and reserved memories.\n");
}
}
}
flush_dcache_range((uintptr_t)dtb, fdt_blob_size(dtb));
#if defined(PLAT_XLAT_TABLES_DYNAMIC)
ret = mmap_remove_dynamic_region((uintptr_t)dtb,
if (!map_ret) {
ret = mmap_remove_dynamic_region((uintptr_t)dtb,
XILINX_OF_BOARD_DTB_MAX_SIZE);
if (ret != 0) {
WARN("Failed to remove dynamic region for dtb: error %d\n", ret);
return;
}
if (ret != 0) {
WARN("Failed to remove dynamic region for dtb:error %d\n",
ret);
}
}
#endif
}
INFO("Changed device tree to advertise PSCI and reserved memories.\n");
#endif
}

47
plat/xilinx/zynqmp/bl31_zynqmp_setup.c
View file

@ -21,6 +21,7 @@
#include <plat/common/platform.h>
#include <custom_svc.h>
#include <plat_fdt.h>
#include <plat_private.h>
#include <plat_startup.h>
#include <zynqmp_def.h>
@ -183,55 +184,9 @@ static uint64_t rdo_el3_interrupt_handler(uint32_t id, uint32_t flags,
}
#endif
#if (defined(XILINX_OF_BOARD_DTB_ADDR) && !IS_TFA_IN_OCM(BL31_BASE))
static void prepare_dtb(void)
{
void *dtb = (void *)XILINX_OF_BOARD_DTB_ADDR;
int ret;
/* Return if no device tree is detected */
if (fdt_check_header(dtb) != 0) {
NOTICE("Can't read DT at %p\n", dtb);
return;
}
ret = fdt_open_into(dtb, dtb, XILINX_OF_BOARD_DTB_MAX_SIZE);
if (ret < 0) {
ERROR("Invalid Device Tree at %p: error %d\n", dtb, ret);
return;
}
if (dt_add_psci_node(dtb)) {
ERROR("Failed to add PSCI Device Tree node\n");
return;
}
if (dt_add_psci_cpu_enable_methods(dtb)) {
ERROR("Failed to add PSCI cpu enable methods in Device Tree\n");
return;
}
/* Reserve memory used by Trusted Firmware. */
if (fdt_add_reserved_memory(dtb, "tf-a", BL31_BASE,
(size_t) (BL31_LIMIT - BL31_BASE))) {
WARN("Failed to add reserved memory nodes for BL31 to DT.\n");
}
ret = fdt_pack(dtb);
if (ret < 0) {
ERROR("Failed to pack Device Tree at %p: error %d\n", dtb, ret);
}
clean_dcache_range((uintptr_t)dtb, fdt_blob_size(dtb));
INFO("Changed device tree to advertise PSCI and reserved memories.\n");
}
#endif
void bl31_platform_setup(void)
{
#if (defined(XILINX_OF_BOARD_DTB_ADDR) && !IS_TFA_IN_OCM(BL31_BASE))
prepare_dtb();
#endif
/* Initialize the gic cpu and distributor interfaces */
plat_arm_gic_driver_init();

1
plat/xilinx/zynqmp/platform.mk
View file

@ -127,6 +127,7 @@ BL31_SOURCES += drivers/arm/cci/cci.c \
${LIBFDT_SRCS} \
plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \
plat/xilinx/common/plat_startup.c \
plat/xilinx/common/plat_fdt.c \
plat/xilinx/zynqmp/bl31_zynqmp_setup.c \
plat/xilinx/zynqmp/plat_psci.c \
plat/xilinx/zynqmp/plat_zynqmp.c \