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fix(cpus): workaround for Cortex-X2 erratum 2778471

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Cortex-X2 erratum 2778471 is a Cat B erratum that applies
to revisions r0p1, r1p0, r2p0 and r2p1 and is still open.
The workaround is to set CPUACTLR3_EL1[47] to 1.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-1775100/latest

Change-Id: Ia95f0e276482283bf50e06c58c2bc5faab3f62c6
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
This commit is contained in:
Sona Mathew 2023-12-09 13:09:30 -06:00
parent c9508d6a10
commit b01a93d778
5 changed files with 22 additions and 2 deletions
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4
docs/design/cpu-specific-build-macros.rst
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@ -761,6 +761,10 @@ For Cortex-X2, the following errata build flags are defined :
CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
CPU and is still open.
- ``ERRATA_X2_2778471``: This applies errata 2778471 workaround to Cortex-X2
CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
CPU and it is still open.
For Cortex-X3, the following errata build flags are defined :
- ``ERRATA_X3_2070301``: This applies errata 2070301 workaround to the Cortex-X3