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Make enablement of the MMU more flexible
This patch adds a 'flags' parameter to each exception level specific function responsible for enabling the MMU. At present only a single flag which indicates whether the data cache should also be enabled is implemented. Subsequent patches will use this flag when enabling the MMU in the warm boot paths. Change-Id: I0eafae1e678c9ecc604e680851093f1680e9cefa
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754a2b7a09
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6 changed files with 27 additions and 12 deletions
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@ -31,6 +31,14 @@
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#ifndef __XLAT_TABLES_H__
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#ifndef __XLAT_TABLES_H__
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#define __XLAT_TABLES_H__
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#define __XLAT_TABLES_H__
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/*
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* Flags to override default values used to program system registers while
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* enabling the MMU.
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*/
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#define DISABLE_DCACHE (1 << 0)
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#ifndef __ASSEMBLY__
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#include <stdint.h>
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#include <stdint.h>
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/*
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/*
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@ -67,7 +75,8 @@ void mmap_add(const mmap_region_t *mm);
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void init_xlat_tables(void);
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void init_xlat_tables(void);
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void enable_mmu_el1(void);
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void enable_mmu_el1(uint32_t flags);
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void enable_mmu_el3(void);
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void enable_mmu_el3(uint32_t flags);
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#endif /*__ASSEMBLY__*/
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#endif /* __XLAT_TABLES_H__ */
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#endif /* __XLAT_TABLES_H__ */
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@ -180,7 +180,7 @@ unsigned int plat_get_aff_state(unsigned int, unsigned long);
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/*******************************************************************************
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/*******************************************************************************
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* Optional BL3-1 functions (may be overridden)
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* Optional BL3-1 functions (may be overridden)
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******************************************************************************/
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******************************************************************************/
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void bl31_plat_enable_mmu(void);
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void bl31_plat_enable_mmu(uint32_t flags);
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/*******************************************************************************
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/*******************************************************************************
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* Mandatory BL3-2 functions (only if platform contains a BL3-2)
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* Mandatory BL3-2 functions (only if platform contains a BL3-2)
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@ -190,6 +190,6 @@ void bl32_platform_setup(void);
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/*******************************************************************************
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/*******************************************************************************
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* Optional BL3-2 functions (may be overridden)
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* Optional BL3-2 functions (may be overridden)
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******************************************************************************/
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******************************************************************************/
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void bl32_plat_enable_mmu(void);
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void bl32_plat_enable_mmu(uint32_t flags);
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#endif /* __PLATFORM_H__ */
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#endif /* __PLATFORM_H__ */
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@ -292,7 +292,7 @@ void init_xlat_tables(void)
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* exception level
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* exception level
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******************************************************************************/
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******************************************************************************/
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#define DEFINE_ENABLE_MMU_EL(_el, _tcr_extra, _tlbi_fct) \
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#define DEFINE_ENABLE_MMU_EL(_el, _tcr_extra, _tlbi_fct) \
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void enable_mmu_el##_el(void) \
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void enable_mmu_el##_el(uint32_t flags) \
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{ \
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{ \
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uint64_t mair, tcr, ttbr; \
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uint64_t mair, tcr, ttbr; \
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uint32_t sctlr; \
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uint32_t sctlr; \
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@ -330,7 +330,13 @@ void init_xlat_tables(void)
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\
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\
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sctlr = read_sctlr_el##_el(); \
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sctlr = read_sctlr_el##_el(); \
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sctlr |= SCTLR_WXN_BIT | SCTLR_M_BIT | SCTLR_I_BIT; \
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sctlr |= SCTLR_WXN_BIT | SCTLR_M_BIT | SCTLR_I_BIT; \
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sctlr |= SCTLR_A_BIT | SCTLR_C_BIT; \
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sctlr |= SCTLR_A_BIT; \
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\
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if (flags & DISABLE_DCACHE) \
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sctlr &= ~SCTLR_C_BIT; \
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else \
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sctlr |= SCTLR_C_BIT; \
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\
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write_sctlr_el##_el(sctlr); \
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write_sctlr_el##_el(sctlr); \
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\
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\
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/* Ensure the MMU enable takes effect immediately */ \
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/* Ensure the MMU enable takes effect immediately */ \
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@ -38,12 +38,12 @@
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#pragma weak bl31_plat_enable_mmu
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#pragma weak bl31_plat_enable_mmu
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#pragma weak bl32_plat_enable_mmu
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#pragma weak bl32_plat_enable_mmu
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void bl31_plat_enable_mmu(void)
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void bl31_plat_enable_mmu(uint32_t flags)
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{
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{
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enable_mmu_el3();
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enable_mmu_el3(flags);
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}
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}
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void bl32_plat_enable_mmu(void)
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void bl32_plat_enable_mmu(uint32_t flags)
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{
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{
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enable_mmu_el1();
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enable_mmu_el1(flags);
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}
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}
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@ -119,7 +119,7 @@ const unsigned int num_sec_irqs = sizeof(irq_sec_array) /
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mmap_add(fvp_mmap); \
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mmap_add(fvp_mmap); \
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init_xlat_tables(); \
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init_xlat_tables(); \
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\
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\
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enable_mmu_el##_el(); \
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enable_mmu_el##_el(0); \
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}
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}
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/* Define EL1 and EL3 variants of the function initialising the MMU */
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/* Define EL1 and EL3 variants of the function initialising the MMU */
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@ -361,7 +361,7 @@ static unsigned int psci_afflvl0_on_finish(aff_map_node_t *cpu_node)
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/*
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/*
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* Arch. management: Turn on mmu & restore architectural state
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* Arch. management: Turn on mmu & restore architectural state
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*/
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*/
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bl31_plat_enable_mmu();
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bl31_plat_enable_mmu(0);
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/*
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/*
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* All the platform specific actions for turning this cpu
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* All the platform specific actions for turning this cpu
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