From 262dc9f76086970dab3dc43815890bed0ea29c79 Mon Sep 17 00:00:00 2001 From: Bipin Ravi Date: Tue, 27 Feb 2024 17:14:22 -0600 Subject: [PATCH] fix(cpus): workaround for Cortex-A715 erratum 2429384 Cortex-A715 erratum 2429384 is a cat B erratum that applies to revision r1p0 and is fixed in r1p1. The workaround is to set bit[27] of CPUACTLR2_EL1. There is no workaround for revision r0p0. SDEN can be found here: https://developer.arm.com/documentation/SDEN2148827/latest Change-Id: I3cdb1b71567542174759f6946e9c81f77d0d993d Signed-off-by: Bipin Ravi --- docs/design/cpu-specific-build-macros.rst | 4 ++++ lib/cpus/aarch64/cortex_a715.S | 6 ++++++ lib/cpus/cpu-ops.mk | 4 ++++ services/std_svc/errata_abi/errata_abi_main.c | 7 ++++--- 4 files changed, 18 insertions(+), 3 deletions(-) diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index ccb45a8fd..1f27b4c76 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -876,6 +876,10 @@ For Cortex-A520, the following errata build flags are defined : For Cortex-A715, the following errata build flags are defined : +- ``ERRATA_A715_2429384``: This applies errata 2429384 workaround to + Cortex-A715 CPU. This needs to be enabled for revision r1p0. There is no + workaround for revision r0p0. It is fixed in r1p1. + - ``ERRATA_A715_2561034``: This applies errata 2561034 workaround to Cortex-A715 CPU. This needs to be enabled only for revision r1p0. It is fixed in r1p1. diff --git a/lib/cpus/aarch64/cortex_a715.S b/lib/cpus/aarch64/cortex_a715.S index 0faa2768b..44796b6f0 100644 --- a/lib/cpus/aarch64/cortex_a715.S +++ b/lib/cpus/aarch64/cortex_a715.S @@ -26,6 +26,12 @@ wa_cve_2022_23960_bhb_vector_table CORTEX_A715_BHB_LOOP_COUNT, cortex_a715 #endif /* WORKAROUND_CVE_2022_23960 */ +workaround_reset_start cortex_a715, ERRATUM(2429384), ERRATA_A715_2429384 + sysreg_bit_set CORTEX_A715_CPUACTLR2_EL1, BIT(27) +workaround_reset_end cortex_a715, ERRATUM(2429384) + +check_erratum_range cortex_a715, ERRATUM(2429384), CPU_REV(1, 0), CPU_REV(1, 0) + workaround_runtime_start cortex_a715, ERRATUM(2561034), ERRATA_A715_2561034 sysreg_bit_set CORTEX_A715_CPUACTLR2_EL1, BIT(26) workaround_runtime_end cortex_a715, ERRATUM(2561034), NO_ISB diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index 0b4ed6b37..22ca07d40 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -907,6 +907,10 @@ CPU_FLAG_LIST += ERRATA_V2_2779510 # This erratum applies to revisions r0p0, r0p1. Fixed in r0p2. CPU_FLAG_LIST += ERRATA_V2_2801372 +# Flag to apply erratum 2429384 workaround during reset. This erratum applies +# to revision r1p0. There is no workaround for r0p0. It is fixed in r1p1. +CPU_FLAG_LIST += ERRATA_A715_2429384 + # Flag to apply erratum 2561034 workaround during reset. This erratum applies # only to revision r1p0. It is fixed in r1p1. CPU_FLAG_LIST += ERRATA_A715_2561034 diff --git a/services/std_svc/errata_abi/errata_abi_main.c b/services/std_svc/errata_abi/errata_abi_main.c index fe1068dc8..0190e1d03 100644 --- a/services/std_svc/errata_abi/errata_abi_main.c +++ b/services/std_svc/errata_abi/errata_abi_main.c @@ -435,10 +435,11 @@ struct em_cpu_list cpu_list[] = { { .cpu_partnumber = CORTEX_A715_MIDR, .cpu_errata_list = { - [0] = {2561034, 0x10, 0x10, ERRATA_A715_2561034}, - [1] = {2701951, 0x00, 0x11, ERRATA_A715_2701951, \ + [0] = {2429384, 0x00, 0x10, ERRATA_A715_2429384}, + [1] = {2561034, 0x10, 0x10, ERRATA_A715_2561034}, + [2] = {2701951, 0x00, 0x11, ERRATA_A715_2701951, \ ERRATA_NON_ARM_INTERCONNECT}, - [2 ... ERRATA_LIST_END] = UNDEF_ERRATA, + [3 ... ERRATA_LIST_END] = UNDEF_ERRATA, } }, #endif /* CORTEX_A715_H_INC */