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fix(cpus): workaround for Cortex-A510 erratum 2684597

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Cortex-A510 erratum 2684597 is a Cat B erratum that applies to revisions
r0p0, r0p1, r0p2, r0p3, r1p0, r1p1 and r1p2. It is fixed in r1p3. The
workaround is to execute a TSB CSYNC and DSB before executing WFI for
power down.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1873361/latest
https://developer.arm.com/documentation/SDEN1873351/latest

Change-Id: Ic0b24b600bc013eb59c797401fbdc9bda8058d6d
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
This commit is contained in:
Harrison Mutai 2022-12-09 12:14:25 +00:00
parent 695a48b5b4
commit aea4ccf8d9
7 changed files with 92 additions and 5 deletions
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5
lib/psci/psci_private.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -304,6 +304,9 @@ int psci_spd_migrate_info(u_register_t *mpidr);
*/
void prepare_cpu_pwr_dwn(unsigned int power_level);
/* This function applies various CPU errata during power down. */
void apply_cpu_pwr_dwn_errata(void);
/* Private exported functions from psci_on.c */
int psci_cpu_on_start(u_register_t target_cpu,
const entry_point_info_t *ep);