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fix(rcar3-drivers): check loaded NS image area
Check if next NS image invades a previous loaded image. Correct non secure image area to avoid loading a NS image to secure Move GZ compressed payload at 32 * compressed payload size offset, so it is loaded in non-secure area and can be decompressed into non-secure area too. It is unlikely that the up to 2 MiB compressed BL33 blob would decompress to payload larger than 64 MiB . Signed-off-by: Tobias Rist <tobias.rist@joynext.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Fix for compressed BL33 Change-Id: I52fd556aab50687e4791e5dbc45d425f802c8757
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parent
62d1adb69a
commit
ae4860b0f5
3 changed files with 75 additions and 8 deletions
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2021, Renesas Electronics Corporation. All rights reserved.
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* Copyright (c) 2015-2023, Renesas Electronics Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -84,6 +84,29 @@ typedef struct {
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#define RCAR_COUNT_LOAD_BL33 (2U)
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#define RCAR_COUNT_LOAD_BL33X (3U)
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#define CHECK_IMAGE_AREA_CNT (7U)
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#define BOOT_BL2_ADDR (0xE6304000U)
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#define BOOT_BL2_LENGTH (0x19000U)
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typedef struct {
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uintptr_t dest;
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uintptr_t length;
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} addr_loaded_t;
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static addr_loaded_t addr_loaded[CHECK_IMAGE_AREA_CNT] = {
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[0] = {BOOT_BL2_ADDR, BOOT_BL2_LENGTH},
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[1] = {BL31_BASE, RCAR_TRUSTED_SRAM_SIZE},
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#ifndef SPD_NONE
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[2] = {BL32_BASE, BL32_SIZE}
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#endif
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};
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#ifndef SPD_NONE
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static uint32_t addr_loaded_cnt = 3;
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#else
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static uint32_t addr_loaded_cnt = 2;
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#endif
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static const plat_rcar_name_offset_t name_offset[] = {
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{BL31_IMAGE_ID, 0U, RCAR_ATTR_SET_ALL(0, 0, 0)},
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@ -281,10 +304,11 @@ static int32_t check_load_area(uintptr_t dst, uintptr_t len)
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uintptr_t dram_start, dram_end;
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uintptr_t prot_start, prot_end;
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int32_t result = IO_SUCCESS;
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int n;
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dram_start = legacy ? DRAM1_BASE : DRAM_40BIT_BASE;
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dram_start = legacy ? DRAM1_NS_BASE : DRAM_40BIT_BASE;
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dram_end = legacy ? DRAM1_BASE + DRAM1_SIZE :
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dram_end = legacy ? DRAM1_NS_BASE + DRAM1_NS_SIZE :
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DRAM_40BIT_BASE + DRAM_40BIT_SIZE;
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prot_start = legacy ? DRAM_PROTECTED_BASE : DRAM_40BIT_PROTECTED_BASE;
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@ -301,13 +325,54 @@ static int32_t check_load_area(uintptr_t dst, uintptr_t len)
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if (dst >= prot_start && dst < prot_end) {
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ERROR("BL2: dst address is on the protected area.\n");
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result = IO_FAIL;
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goto done;
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}
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if (len > prot_start || (dst < prot_start && dst > prot_start - len)) {
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ERROR("BL2: %s[%d] loaded data is on the protected area.\n",
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__func__, __LINE__);
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result = IO_FAIL;
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goto done;
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}
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if (addr_loaded_cnt >= CHECK_IMAGE_AREA_CNT) {
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ERROR("BL2: max loadable non secure images reached\n");
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result = IO_FAIL;
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goto done;
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}
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addr_loaded[addr_loaded_cnt].dest = dst;
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addr_loaded[addr_loaded_cnt].length = len;
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for (n = 0; n < addr_loaded_cnt; n++) {
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/*
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* Check if next image invades a previous loaded image
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*
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* IMAGE n: area from previous image: dest| IMAGE n |length
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* IMAGE n+1: area from next image: dst | IMAGE n |len
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*
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* 1. check:
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* | IMAGE n |
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* | IMAGE n+1 |
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* 2. check:
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* | IMAGE n |
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* | IMAGE n+1 |
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* 3. check:
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* | IMAGE n |
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* | IMAGE n+1 |
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*/
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if (((dst >= addr_loaded[n].dest) &&
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(dst <= addr_loaded[n].dest + addr_loaded[n].length)) ||
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((dst + len >= addr_loaded[n].dest) &&
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(dst + len <= addr_loaded[n].dest + addr_loaded[n].length)) ||
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((dst <= addr_loaded[n].dest) &&
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(dst + len >= addr_loaded[n].dest + addr_loaded[n].length))) {
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ERROR("BL2: next image overlap a previous image area.\n");
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result = IO_FAIL;
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goto done;
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}
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}
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addr_loaded_cnt++;
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done:
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if (result == IO_FAIL) {
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ERROR("BL2: Out of range : dst=0x%lx len=0x%lx\n", dst, len);
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2021, Renesas Electronics Corporation. All rights reserved.
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* Copyright (c) 2015-2023, Renesas Electronics Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -144,7 +144,8 @@
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******************************************************************************/
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#ifndef SPD_NONE
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#define BL32_BASE U(0x44100000)
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#define BL32_LIMIT (BL32_BASE + U(0x200000))
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#define BL32_SIZE U(0x200000)
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#define BL32_LIMIT (BL32_BASE + BL32_SIZE)
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#endif
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/*******************************************************************************
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@ -152,7 +153,8 @@
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******************************************************************************/
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#define BL33_BASE DRAM1_NS_BASE
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#define BL33_COMP_SIZE U(0x200000)
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#define BL33_COMP_BASE (BL33_BASE - BL33_COMP_SIZE)
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#define BL33_DECOMP_SIZE (BL33_COMP_SIZE * 32)
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#define BL33_COMP_BASE (BL33_BASE + BL33_DECOMP_SIZE)
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/*******************************************************************************
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* Platform specific page table and MMU setup constants
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2021, Renesas Electronics Corporation. All rights reserved.
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* Copyright (c) 2015-2023, Renesas Electronics Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#define DRAM_LIMIT ULL(0x0000010000000000)
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#define DRAM1_BASE U(0x40000000)
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#define DRAM1_SIZE U(0x80000000)
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#define DRAM1_NS_BASE (DRAM1_BASE + U(0x10000000))
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#define DRAM1_NS_BASE (DRAM1_BASE + U(0x08000000))
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#define DRAM1_NS_SIZE (DRAM1_SIZE - DRAM1_NS_BASE)
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#define DRAM_40BIT_BASE ULL(0x0400000000)
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#define DRAM_40BIT_SIZE ULL(0x0400000000)
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