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fix(zynqmp): ensure memory write finish with dsb()

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GICD reg write must complete before core goes to idle
mode. Achieve this with dsb() barrier instruction in IPI
ISR

Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
Change-Id: I5af42ca901567ee5e54a5434ebe3e673a92cb9be
This commit is contained in:
Tanmay Shah 2022-09-13 11:10:08 -07:00
parent 207bda950d
commit ac6c135c83
1 changed files with 2 additions and 0 deletions
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2
plat/xilinx/zynqmp/pm_service/pm_svc_main.c
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@ -151,6 +151,8 @@ static uint64_t __unused __dead2 zynqmp_sgi7_irq(uint32_t id, uint32_t flags,
0xffffffff);
}
dsb();
spin_unlock(&inc_lock);
if (active_cores == 0) {