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Merge "rockchip: px30: Fix build error" into integration

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Soby Mathew 2019-07-26 10:26:37 +00:00 • committed by TrustedFirmware Code Review
commit ac1adfde3f
1 changed files with 3 additions and 3 deletions
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6
plat/rockchip/px30/drivers/pmu/pmu.c
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@ -626,13 +626,13 @@ static void pvtm_32k_config(void)
/* select pvtm as 32k source */ /* select pvtm as 32k source */
mmio_write_32(PMUCRU_BASE + CRU_PMU_CLKSELS_CON(0), mmio_write_32(PMUCRU_BASE + CRU_PMU_CLKSELS_CON(0),
BITS_WITH_WMASK(1, 0x3, 14)); BITS_WITH_WMASK(1, 0x3U, 14));
} }
static void pvtm_32k_config_restore(void) static void pvtm_32k_config_restore(void)
{ {
mmio_write_32(PMUCRU_BASE + CRU_PMU_CLKSELS_CON(0), mmio_write_32(PMUCRU_BASE + CRU_PMU_CLKSELS_CON(0),
ddr_data.pmu_cru_clksel_con0 | BITS_WMSK(0x3, 14)); ddr_data.pmu_cru_clksel_con0 | BITS_WMSK(0x3U, 14));
mmio_write_32(PMUGRF_BASE + PMUGRF_PVTM_CON0, mmio_write_32(PMUGRF_BASE + PMUGRF_PVTM_CON0,
WITH_16BITS_WMSK(ddr_data.pgrf_pvtm_con[0])); WITH_16BITS_WMSK(ddr_data.pgrf_pvtm_con[0]));
@ -869,7 +869,7 @@ static inline void pm_pll_wait_lock(uint32_t pll_base, uint32_t pll_id)
static inline void pll_pwr_ctr(uint32_t pll_base, uint32_t pll_id, uint32_t pd) static inline void pll_pwr_ctr(uint32_t pll_base, uint32_t pll_id, uint32_t pd)
{ {
mmio_write_32(pll_base + PLL_CON(1), mmio_write_32(pll_base + PLL_CON(1),
BITS_WITH_WMASK(1, 1, 15)); BITS_WITH_WMASK(1, 1U, 15));
if (pd) if (pd)
mmio_write_32(pll_base + PLL_CON(1), mmio_write_32(pll_base + PLL_CON(1),
BITS_WITH_WMASK(1, 1, 14)); BITS_WITH_WMASK(1, 1, 14));