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Add support for Cortex-A57 erratum 828024 workaround
Change-Id: I632a8c5bb517ff89c69268e865be33101059be7d
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4 changed files with 48 additions and 0 deletions
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@ -63,6 +63,9 @@ For Cortex-A57, following errata build flags are defined :
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* `ERRATA_A57_826974`: This applies errata 826974 workaround to Cortex-A57
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* `ERRATA_A57_826974`: This applies errata 826974 workaround to Cortex-A57
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CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
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CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
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* `ERRATA_A57_828024`: This applies errata 828024 workaround to Cortex-A57
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CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
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3. CPU Specific optimizations
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3. CPU Specific optimizations
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------------------------------
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------------------------------
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@ -65,6 +65,8 @@
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#define CPUACTLR_DIS_OVERREAD (1 << 52)
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#define CPUACTLR_DIS_OVERREAD (1 << 52)
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#define CPUACTLR_NO_ALLOC_WBWA (1 << 49)
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#define CPUACTLR_NO_ALLOC_WBWA (1 << 49)
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#define CPUACTLR_DCC_AS_DCCI (1 << 44)
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#define CPUACTLR_DCC_AS_DCCI (1 << 44)
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#define CPUACTLR_DIS_STREAMING (3 << 27)
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#define CPUACTLR_DIS_L1_STREAMING (3 << 25)
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/*******************************************************************************
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/*******************************************************************************
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* L2 Control register specific definitions.
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* L2 Control register specific definitions.
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@ -193,6 +193,37 @@ apply_826974:
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ret
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ret
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endfunc errata_a57_826974_wa
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endfunc errata_a57_826974_wa
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/* ---------------------------------------------------
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* Errata Workaround for Cortex A57 Errata #828024.
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* This applies only to revision <= r1p1 of Cortex A57.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Clobbers : x0 - x5
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* ---------------------------------------------------
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*/
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func errata_a57_828024_wa
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/*
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* Compare x0 against revision r1p1
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*/
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cmp x0, #0x11
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b.ls apply_828024
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#if LOG_LEVEL >= LOG_LEVEL_VERBOSE
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b print_revision_warning
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#else
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ret
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#endif
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apply_828024:
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mrs x1, CPUACTLR_EL1
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/*
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* Setting the relevant bits in CPUACTLR_EL1 has to be done in 2
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* instructions here because the resulting bitmask doesn't fit in a
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* 16-bit value so it cannot be encoded in a single instruction.
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*/
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orr x1, x1, #CPUACTLR_NO_ALLOC_WBWA
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orr x1, x1, #(CPUACTLR_DIS_L1_STREAMING | CPUACTLR_DIS_STREAMING)
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msr CPUACTLR_EL1, x1
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ret
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endfunc errata_a57_828024_wa
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/* -------------------------------------------------
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/* -------------------------------------------------
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* The CPU Ops reset function for Cortex-A57.
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* The CPU Ops reset function for Cortex-A57.
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@ -232,6 +263,10 @@ func cortex_a57_reset_func
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bl errata_a57_826974_wa
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bl errata_a57_826974_wa
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#endif
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#endif
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#if ERRATA_A57_828024
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mov x0, x15
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bl errata_a57_828024_wa
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#endif
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/* ---------------------------------------------
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/* ---------------------------------------------
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* Enable the SMP bit.
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* Enable the SMP bit.
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* ---------------------------------------------
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* ---------------------------------------------
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@ -78,6 +78,10 @@ ERRATA_A57_813420 ?=0
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# only to revision <= r1p1 of the Cortex A57 cpu.
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# only to revision <= r1p1 of the Cortex A57 cpu.
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ERRATA_A57_826974 ?=0
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ERRATA_A57_826974 ?=0
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# Flag to apply erratum 828024 workaround during reset. This erratum applies
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# only to revision <= r1p1 of the Cortex A57 cpu.
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ERRATA_A57_828024 ?=0
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# Process ERRATA_A53_826319 flag
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# Process ERRATA_A53_826319 flag
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$(eval $(call assert_boolean,ERRATA_A53_826319))
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$(eval $(call assert_boolean,ERRATA_A53_826319))
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$(eval $(call add_define,ERRATA_A53_826319))
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$(eval $(call add_define,ERRATA_A53_826319))
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@ -97,3 +101,7 @@ $(eval $(call add_define,ERRATA_A57_813420))
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# Process ERRATA_A57_826974 flag
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# Process ERRATA_A57_826974 flag
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$(eval $(call assert_boolean,ERRATA_A57_826974))
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$(eval $(call assert_boolean,ERRATA_A57_826974))
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$(eval $(call add_define,ERRATA_A57_826974))
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$(eval $(call add_define,ERRATA_A57_826974))
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# Process ERRATA_A57_828024 flag
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$(eval $(call assert_boolean,ERRATA_A57_828024))
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$(eval $(call add_define,ERRATA_A57_828024))
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