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https://github.com/ARM-software/arm-trusted-firmware.git
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Add exception vector guards
This patch adds guards so that an exception vector exceeding 32 instructions will generate a compile-time error. This keeps the exception handlers in check from spilling over. Change-Id: I7aa56dd0071a333664e2814c656d3896032046fe
This commit is contained in:
Jeenu Viswambharan
Dan Handley
parent
ca823d2c88
commit
a7934d6950
3 changed files with 49 additions and 0 deletions
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@ -33,6 +33,7 @@
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#include <bl1.h>
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#include <platform.h>
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#include <runtime_svc.h>
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#include <asm_macros.S>
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.globl early_exceptions
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.weak display_boot_progress
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@ -55,24 +56,28 @@ SynchronousExceptionSP0:
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mov x0, #SYNC_EXCEPTION_SP_EL0
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bl plat_report_exception
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b SynchronousExceptionSP0
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check_vector_size SynchronousExceptionSP0
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.align 7
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IrqSP0:
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mov x0, #IRQ_SP_EL0
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bl plat_report_exception
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b IrqSP0
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check_vector_size IrqSP0
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.align 7
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FiqSP0:
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mov x0, #FIQ_SP_EL0
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bl plat_report_exception
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b FiqSP0
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check_vector_size FiqSP0
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.align 7
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SErrorSP0:
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mov x0, #SERROR_SP_EL0
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bl plat_report_exception
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b SErrorSP0
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check_vector_size SErrorSP0
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/* -----------------------------------------------------
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* Current EL with SPx: 0x200 - 0x380
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@ -83,24 +88,28 @@ SynchronousExceptionSPx:
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mov x0, #SYNC_EXCEPTION_SP_ELX
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bl plat_report_exception
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b SynchronousExceptionSPx
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check_vector_size SynchronousExceptionSPx
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.align 7
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IrqSPx:
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mov x0, #IRQ_SP_ELX
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bl plat_report_exception
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b IrqSPx
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check_vector_size IrqSPx
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.align 7
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FiqSPx:
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mov x0, #FIQ_SP_ELX
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bl plat_report_exception
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b FiqSPx
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check_vector_size FiqSPx
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.align 7
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SErrorSPx:
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mov x0, #SERROR_SP_ELX
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bl plat_report_exception
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b SErrorSPx
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check_vector_size SErrorSPx
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/* -----------------------------------------------------
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* Lower EL using AArch64 : 0x400 - 0x580
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@ -115,24 +124,28 @@ SynchronousExceptionA64:
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* ---------------------------------------------
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*/
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b process_exception
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check_vector_size SynchronousExceptionA64
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.align 7
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IrqA64:
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mov x0, #IRQ_AARCH64
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bl plat_report_exception
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b IrqA64
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check_vector_size IrqA64
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.align 7
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FiqA64:
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mov x0, #FIQ_AARCH64
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bl plat_report_exception
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b FiqA64
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check_vector_size FiqA64
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.align 7
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SErrorA64:
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mov x0, #SERROR_AARCH64
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bl plat_report_exception
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b SErrorA64
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check_vector_size SErrorA64
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/* -----------------------------------------------------
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* Lower EL using AArch32 : 0x0 - 0x180
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@ -143,24 +156,28 @@ SynchronousExceptionA32:
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mov x0, #SYNC_EXCEPTION_AARCH32
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bl plat_report_exception
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b SynchronousExceptionA32
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check_vector_size SynchronousExceptionA32
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.align 7
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IrqA32:
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mov x0, #IRQ_AARCH32
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bl plat_report_exception
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b IrqA32
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check_vector_size IrqA32
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.align 7
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FiqA32:
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mov x0, #FIQ_AARCH32
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bl plat_report_exception
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b FiqA32
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check_vector_size FiqA32
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.align 7
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SErrorA32:
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mov x0, #SERROR_AARCH32
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bl plat_report_exception
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b SErrorA32
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check_vector_size SErrorA32
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.align 7
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@ -32,6 +32,7 @@
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#include <runtime_svc.h>
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#include <platform.h>
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#include <context.h>
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#include "asm_macros.S"
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#include "cm_macros.S"
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.globl runtime_exceptions
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@ -53,6 +54,7 @@ sync_exception_sp_el0:
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*/
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wfi
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b sync_exception_sp_el0
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check_vector_size sync_exception_sp_el0
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.align 7
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/* -----------------------------------------------------
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@ -63,16 +65,19 @@ sync_exception_sp_el0:
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irq_sp_el0:
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handle_async_exception IRQ_SP_EL0
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b irq_sp_el0
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check_vector_size irq_sp_el0
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.align 7
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fiq_sp_el0:
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handle_async_exception FIQ_SP_EL0
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b fiq_sp_el0
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check_vector_size fiq_sp_el0
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.align 7
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serror_sp_el0:
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handle_async_exception SERROR_SP_EL0
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b serror_sp_el0
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check_vector_size serror_sp_el0
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/* -----------------------------------------------------
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* Current EL with SPx: 0x200 - 0x380
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@ -93,6 +98,7 @@ sync_exception_sp_elx:
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*/
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wfi
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b sync_exception_sp_elx
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check_vector_size sync_exception_sp_elx
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/* -----------------------------------------------------
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* As mentioned in the previous comment, all bets are
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@ -103,12 +109,17 @@ sync_exception_sp_elx:
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.align 7
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irq_sp_elx:
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b irq_sp_elx
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check_vector_size irq_sp_elx
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.align 7
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fiq_sp_elx:
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b fiq_sp_elx
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check_vector_size fiq_sp_elx
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.align 7
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serror_sp_elx:
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b serror_sp_elx
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check_vector_size serror_sp_elx
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/* -----------------------------------------------------
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* Lower EL using AArch64 : 0x400 - 0x580
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@ -125,6 +136,7 @@ sync_exception_aarch64:
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* -----------------------------------------------------
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*/
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handle_sync_exception
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check_vector_size sync_exception_aarch64
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.align 7
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/* -----------------------------------------------------
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@ -135,16 +147,19 @@ sync_exception_aarch64:
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irq_aarch64:
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handle_async_exception IRQ_AARCH64
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b irq_aarch64
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check_vector_size irq_aarch64
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.align 7
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fiq_aarch64:
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handle_async_exception FIQ_AARCH64
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b fiq_aarch64
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check_vector_size fiq_aarch64
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.align 7
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serror_aarch64:
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handle_async_exception SERROR_AARCH64
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b serror_aarch64
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check_vector_size serror_aarch64
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/* -----------------------------------------------------
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* Lower EL using AArch32 : 0x600 - 0x780
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@ -161,6 +176,7 @@ sync_exception_aarch32:
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* -----------------------------------------------------
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*/
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handle_sync_exception
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check_vector_size sync_exception_aarch32
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.align 7
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/* -----------------------------------------------------
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@ -171,16 +187,20 @@ sync_exception_aarch32:
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irq_aarch32:
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handle_async_exception IRQ_AARCH32
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b irq_aarch32
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check_vector_size irq_aarch32
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.align 7
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fiq_aarch32:
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handle_async_exception FIQ_AARCH32
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b fiq_aarch32
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check_vector_size fiq_aarch32
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.align 7
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serror_aarch32:
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handle_async_exception SERROR_AARCH32
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b serror_aarch32
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check_vector_size serror_aarch32
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.align 7
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.section .text, "ax"
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@ -68,3 +68,15 @@
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ubfx \end_level, \clidr, \shift, \fw
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lsl \end_level, \end_level, \ls
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.endm
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/*
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* This macro verifies that the a given vector doesn't exceed the
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* architectural limit of 32 instructions. This is meant to be placed
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* immedately after the last instruction in the vector. It takes the
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* vector entry as the parameter
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*/
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.macro check_vector_size since
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.if (. - \since) > (32 * 4)
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.error "Vector exceeds 32 instructions"
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.endif
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.endm
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