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fix(errata): workaround for Cortex-A510 erratum 2371937
Cortex-A510 erratum 2371937 is a Cat B erratum that applies to revisions r0p0, r0p1, r0p2, r0p3, r1p0, and r1p1. It is fixed in r1p2. The workaround is to set the ATOM field of CPUECTLR_EL1 (bits [40:38]) to 0b010, which will force all cacheable atomic operations to be executed near. SDEN can be found here: https://developer.arm.com/documentation/SDEN1873351/latest https://developer.arm.com/documentation/SDEN1873361/latest Signed-off-by: Akram Ahmad <Akram.Ahmad@arm.com> Change-Id: Ia219a609a3397e39631de65831ecff8a3cd1227e
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4 changed files with 55 additions and 1 deletions
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@ -589,6 +589,10 @@ For Cortex-A510, the following errata build flags are defined :
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Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2,
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Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2,
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r0p3 and r1p0, it is fixed in r1p1.
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r0p3 and r1p0, it is fixed in r1p1.
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- ``ERRATA_A510_2371937``: This applies errata 2371937 workaround to
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Cortex-A510 CPU. This needs to applied for revisions r0p0, r0p1, r0p2,
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r0p3, r1p0, r1p1, and is fixed in r1p2.
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DSU Errata Workarounds
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DSU Errata Workarounds
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----------------------
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----------------------
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@ -17,6 +17,8 @@
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#define CORTEX_A510_CPUECTLR_EL1_READPREFERUNIQUE_DISABLE U(1)
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#define CORTEX_A510_CPUECTLR_EL1_READPREFERUNIQUE_DISABLE U(1)
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#define CORTEX_A510_CPUECTLR_EL1_RSCTL_SHIFT U(23)
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#define CORTEX_A510_CPUECTLR_EL1_RSCTL_SHIFT U(23)
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#define CORTEX_A510_CPUECTLR_EL1_NTCTL_SHIFT U(46)
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#define CORTEX_A510_CPUECTLR_EL1_NTCTL_SHIFT U(46)
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#define CORTEX_A510_CPUECTLR_EL1_ATOM_EXECALLINSTRNEAR U(2)
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#define CORTEX_A510_CPUECTLR_EL1_ATOM U(38)
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/*******************************************************************************
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/*******************************************************************************
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* CPU Power Control register specific definitions
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* CPU Power Control register specific definitions
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@ -264,6 +264,40 @@ func check_errata_2172148
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b cpu_rev_var_ls
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b cpu_rev_var_ls
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endfunc check_errata_2172148
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endfunc check_errata_2172148
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/*---------------------------------------------------
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* Errata Workaround for Cortex-A510 Errata #2371937.
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* This applies to revisions r1p1 and lower, and is
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* fixed in r1p2.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0, x1, x17
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*---------------------------------------------------
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*/
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func errata_cortex_a510_2371937_wa
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mov x17, x30
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bl check_errata_2371937
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cbz x0, 1f
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/*
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* Cacheable atomic operations can be forced
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* to be executed near by setting
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* IMP_CPUECTLR_EL1.ATOM=0b010. ATOM is found
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* in [40:38] of CPUECTLR_EL1.
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*/
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mrs x0, CORTEX_A510_CPUECTLR_EL1
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mov x1, CORTEX_A510_CPUECTLR_EL1_ATOM_EXECALLINSTRNEAR
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bfi x0, x1, CORTEX_A510_CPUECTLR_EL1_ATOM, #3
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msr CORTEX_A510_CPUECTLR_EL1, x0
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1:
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ret x17
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endfunc errata_cortex_a510_2371937_wa
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func check_errata_2371937
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/* Applies to r1p1 and lower */
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mov x1, #0x11
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b cpu_rev_var_ls
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endfunc check_errata_2371937
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/* ----------------------------------------------------
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/* ----------------------------------------------------
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* HW will do the cache maintenance while powering down
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* HW will do the cache maintenance while powering down
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* ----------------------------------------------------
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* ----------------------------------------------------
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@ -301,6 +335,7 @@ func cortex_a510_errata_report
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report_errata ERRATA_A510_2250311, cortex_a510, 2250311
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report_errata ERRATA_A510_2250311, cortex_a510, 2250311
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report_errata ERRATA_A510_2218950, cortex_a510, 2218950
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report_errata ERRATA_A510_2218950, cortex_a510, 2218950
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report_errata ERRATA_A510_2172148, cortex_a510, 2172148
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report_errata ERRATA_A510_2172148, cortex_a510, 2172148
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report_errata ERRATA_A510_2371937, cortex_a510, 2371937
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report_errata ERRATA_DSU_2313941, cortex_a510, dsu_2313941
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report_errata ERRATA_DSU_2313941, cortex_a510, dsu_2313941
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ldp x8, x30, [sp], #16
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ldp x8, x30, [sp], #16
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@ -352,6 +387,11 @@ func cortex_a510_reset_func
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bl errata_cortex_a510_2218950_wa
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bl errata_cortex_a510_2218950_wa
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#endif
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#endif
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#if ERRATA_A510_2371937
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mov x0, x18
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bl errata_cortex_a510_2371937_wa
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#endif
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#if ERRATA_A510_2172148
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#if ERRATA_A510_2172148
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mov x0, x18
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mov x0, x18
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bl errata_cortex_a510_2172148_wa
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bl errata_cortex_a510_2172148_wa
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@ -645,6 +645,10 @@ ERRATA_A510_2218950 ?=0
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# to revisions r0p0, r0p1, r0p2, r0p3 and r1p0, and is fixed in r1p1.
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# to revisions r0p0, r0p1, r0p2, r0p3 and r1p0, and is fixed in r1p1.
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ERRATA_A510_2172148 ?=0
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ERRATA_A510_2172148 ?=0
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# Flag to apply erratum 2371937 workaround during reset. This erratum applies
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# to revisions r0p0, r0p1, r0p2, r0p3, r1p0, and r1p1. It is fixed in r1p2.
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ERRATA_A510_2371937 ?=0
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# Flag to apply DSU erratum 798953. This erratum applies to DSUs revision r0p0.
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# Flag to apply DSU erratum 798953. This erratum applies to DSUs revision r0p0.
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# Applying the workaround results in higher DSU power consumption on idle.
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# Applying the workaround results in higher DSU power consumption on idle.
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ERRATA_DSU_798953 ?=0
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ERRATA_DSU_798953 ?=0
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@ -1215,6 +1219,10 @@ $(eval $(call add_define,ERRATA_A510_2218950))
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$(eval $(call assert_boolean,ERRATA_A510_2172148))
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$(eval $(call assert_boolean,ERRATA_A510_2172148))
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$(eval $(call add_define,ERRATA_A510_2172148))
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$(eval $(call add_define,ERRATA_A510_2172148))
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# Process ERRATA_A510_2371937 flag
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$(eval $(call assert_boolean,ERRATA_A510_2371937))
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$(eval $(call add_define,ERRATA_A510_2371937))
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# Process ERRATA_DSU_798953 flag
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# Process ERRATA_DSU_798953 flag
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$(eval $(call assert_boolean,ERRATA_DSU_798953))
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$(eval $(call assert_boolean,ERRATA_DSU_798953))
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$(eval $(call add_define,ERRATA_DSU_798953))
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$(eval $(call add_define,ERRATA_DSU_798953))
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