chore(bl1): remove redundant bl1_arch_next_el_setup

bl1_arch_next_el_setup has no references anywhere in TF-A. Remove it as
it is redundant

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Ice2997f33c318390883347acdd03dc6755f87ea5
This commit is contained in:
Boyan Karatotev 2023-03-15 13:47:20 +00:00
parent 6c42a73627
commit a64010e4c6
3 changed files with 0 additions and 33 deletions

View file

@ -17,19 +17,3 @@ void bl1_arch_setup(void)
/* Set the next EL to be AArch64 */
write_scr_el3(read_scr_el3() | SCR_RW_BIT);
}
/*******************************************************************************
* Set the Secure EL1 required architectural state
******************************************************************************/
void bl1_arch_next_el_setup(void)
{
u_register_t next_sctlr;
/* Use the same endianness than the current BL */
next_sctlr = (read_sctlr_el3() & SCTLR_EE_BIT);
/* Set SCTLR Secure EL1 */
next_sctlr |= SCTLR_EL1_RES1;
write_sctlr_el1(next_sctlr);
}

View file

@ -17,7 +17,6 @@ extern entry_point_info_t *bl2_ep_info;
* Function prototypes
*****************************************/
void bl1_arch_setup(void);
void bl1_arch_next_el_setup(void);
void bl1_prepare_next_image(unsigned int image_id);
void bl1_run_bl2_in_root(void);

View file

@ -17,19 +17,3 @@ void bl1_arch_setup(void)
{
/* v8-R64 does not include SCRs. */
}
/*******************************************************************************
* Set the Secure EL1 required architectural state
******************************************************************************/
void bl1_arch_next_el_setup(void)
{
u_register_t next_sctlr;
/* Use the same endianness than the current BL */
next_sctlr = (read_sctlr_el2() & SCTLR_EE_BIT);
/* Set SCTLR Secure EL1 */
next_sctlr |= SCTLR_EL1_RES1;
write_sctlr_el1(next_sctlr);
}