feat(fpmr): disable FPMR trap

This patch enables support of FEAT_FPMR by enabling access
to FPMR register. It achieves it by setting the EnFPM bit of
SCR_EL3. This feature is currently enabled for NS world only.

Reference:
https://developer.arm.com/documentation/109697/2024_09/
Feature-descriptions/The-Armv9-5-architecture-extension?lang=en

Change-Id: I580c409b9b22f8ead0737502280fb9093a3d5dd2
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
This commit is contained in:
Arvind Ram Prakash 2024-11-11 14:32:37 -06:00
parent e372c29153
commit a57e18e433
12 changed files with 110 additions and 0 deletions

View file

@ -280,6 +280,12 @@ static unsigned int read_feat_d128_id_field(void)
ID_AA64MMFR3_EL1_D128_MASK);
}
static unsigned int read_feat_fpmr_id_field(void)
{
return ISOLATE_FIELD(read_id_aa64pfr2_el1(), ID_AA64PFR2_EL1_FPMR_SHIFT,
ID_AA64PFR2_EL1_FPMR_MASK);
}
/***********************************************************************************
* TF-A supports many Arm architectural features starting from arch version
* (8.0 till 8.7+). These features are mostly enabled through build flags. This
@ -405,6 +411,8 @@ void detect_arch_features(void)
"SME", 1, 2);
check_feature(ENABLE_SME2_FOR_NS, read_feat_sme_id_field(),
"SME2", 2, 2);
check_feature(ENABLE_FEAT_FPMR, read_feat_fpmr_id_field(),
"FPMR", 1, 1);
/* v9.3 features */
check_feature(ENABLE_FEAT_D128, read_feat_d128_id_field(),