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fix(intel): update debug messages to appropriate class

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Update debug messages to VERBOSE class wherever required.

Change-Id: I44ea6b660581285290f54a507dd1131d26be2ec8
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>
This commit is contained in:
Girisha Dengi 2024-12-06 18:01:10 +08:00 • committed by Jit Loon Lim
parent ea7bffdb85
commit a550aeb394
1 changed files with 2 additions and 2 deletions
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4
plat/intel/soc/common/soc/socfpga_reset_manager.c
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@ -1052,7 +1052,7 @@ int socfpga_bridges_disable(uint32_t mask)
1000);
if (ret < 0) {
ERROR("F2S bridge fpga handshake fpgahsack: Timeout\n");
VERBOSE("F2S bridge fpga handshake fpgahsack: Timeout\n");
}
/*
@ -1082,7 +1082,7 @@ int socfpga_bridges_disable(uint32_t mask)
1000);
if (ret < 0) {
ERROR("F2S bridge fpga handshake f2s_flush_ack: Timeout\n");
VERBOSE("F2S bridge fpga handshake f2s_flush_ack: Timeout\n");
}
/*