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Merge changes from topic "st-asm-helpers" into integration

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* changes:
  feat(stm32mp2): put back core 1 in wfi after debugger's halt
  feat(stm32mp2): add plat_my_core_pos
  fix(stm32mp2): correct early/crash console init
This commit is contained in:
Manish Pandey 2024-01-16 16:51:31 +01:00 • committed by TrustedFirmware Code Review
commit a28fac0bce
1 changed files with 38 additions and 7 deletions
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45
plat/st/stm32mp2/aarch64/stm32mp2_helper.S
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@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2023, STMicroelectronics - All Rights Reserved * Copyright (c) 2023-2024, STMicroelectronics - All Rights Reserved
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -14,6 +14,7 @@
.globl platform_mem_init .globl platform_mem_init
.globl plat_secondary_cold_boot_setup .globl plat_secondary_cold_boot_setup
.globl plat_is_my_cpu_primary .globl plat_is_my_cpu_primary
.globl plat_my_core_pos
.globl plat_crash_console_init .globl plat_crash_console_init
.globl plat_crash_console_flush .globl plat_crash_console_flush
.globl plat_crash_console_putc .globl plat_crash_console_putc
@ -32,9 +33,14 @@ endfunc platform_mem_init
*/ */
func plat_secondary_cold_boot_setup func plat_secondary_cold_boot_setup
dsb sy dsb sy
1:
wfi wfi
/* This shouldn't be reached */ /*
b . * This shouldn't be reached, but when a debugger halts the
* secondary core it causes exit from wfi.
* Put back the core in wfi.
*/
b 1b
endfunc plat_secondary_cold_boot_setup endfunc plat_secondary_cold_boot_setup
/* ---------------------------------------------- /* ----------------------------------------------
@ -50,6 +56,31 @@ func plat_is_my_cpu_primary
ret ret
endfunc plat_is_my_cpu_primary endfunc plat_is_my_cpu_primary
/* -----------------------------------------------------------
* unsigned int plat_stm32mp_get_core_pos(u_register_t mpidr)
* Helper function to calculate the core position.
* With this function: CorePos = (ClusterId * 4) +
* CoreId
* -----------------------------------------------------------
*/
func plat_stm32mp_get_core_pos
and x1, x0, #MPIDR_CPU_MASK
and x0, x0, #MPIDR_CLUSTER_MASK
add x0, x1, x0, LSR #6
ret
endfunc plat_stm32mp_get_core_pos
/* -----------------------------------------------------
* unsigned int plat_my_core_pos(void)
* This function uses the plat_stm32mp_get_core_pos()
* definition to get the index of the calling CPU.
* -----------------------------------------------------
*/
func plat_my_core_pos
mrs x0, mpidr_el1
b plat_stm32mp_get_core_pos
endfunc plat_my_core_pos
/* --------------------------------------------- /* ---------------------------------------------
* int plat_crash_console_init(void) * int plat_crash_console_init(void)
* *
@ -65,13 +96,13 @@ func plat_crash_console_init
str x0, [x1] str x0, [x1]
1: 1:
ldr x0, [x1] ldr x0, [x1]
ands x2, x0, x2 tst x0, #DEBUG_UART_RST_BIT
beq 1b beq 1b
bic x2, x2, #DEBUG_UART_RST_BIT bic x0, x0, #DEBUG_UART_RST_BIT
str x2, [x1] str x0, [x1]
2: 2:
ldr x0, [x1] ldr x0, [x1]
ands x2, x0, x2 tst x0, #DEBUG_UART_RST_BIT
bne 2b bne 2b
/* Enable GPIOs for UART TX */ /* Enable GPIOs for UART TX */
mov_imm x1, (RCC_BASE + DEBUG_UART_TX_GPIO_BANK_CLK_REG) mov_imm x1, (RCC_BASE + DEBUG_UART_TX_GPIO_BANK_CLK_REG)