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Merge changes from topic "advk-serror" into integration
* changes: fix(plat/marvell/a3k): disable HANDLE_EA_EL3_FIRST by default fix(plat/marvell/a3k): update information about PCIe abort hack
This commit is contained in:
Madhukar Pappireddy
TrustedFirmware Code Review
commit
a138717d9e
3 changed files with 94 additions and 4 deletions
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@ -153,6 +153,29 @@ A7K/8K/CN913x specific build options:
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Armada37x0 specific build options:
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- HANDLE_EA_EL3_FIRST
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When ``HANDLE_EA_EL3_FIRST=1``, External Aborts and SError Interrupts will be always trapped
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in TF-A. TF-A in this case enables dirty hack / workaround for a bug found in U-Boot and
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Linux kernel PCIe controller driver pci-aardvark.c, traps and then masks SError interrupt
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caused by AXI SLVERR on external access (syndrome 0xbf000002).
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Otherwise when ``HANDLE_EA_EL3_FIRST=0``, these exceptions will be trapped in the current
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exception level (or in EL1 if the current exception level is EL0). So exceptions caused by
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U-Boot will be trapped in U-Boot, exceptions caused by Linux kernel (or user applications)
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will be trapped in Linux kernel.
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Mentioned bug in pci-aardvark.c driver is fixed in U-Boot version v2021.07 and Linux kernel
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version v5.13 (workarounded since Linux kernel version 5.9) and also backported in Linux
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kernel stable releases since versions v5.12.13, v5.10.46, v5.4.128, v4.19.198, v4.14.240.
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If target system has already patched version of U-Boot and Linux kernel then it is strongly
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recommended to not enable this workaround as it disallows propagating of all External Aborts
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to running Linux kernel and makes correctable errors as fatal aborts.
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This option is now disabled by default. In past this option was enabled by default in
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TF-A versions v2.2, v2.3, v2.4 and v2.5.
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- CM3_SYSTEM_RESET
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When ``CM3_SYSTEM_RESET=1``, the Cortex-M3 secure coprocessor will be used for system reset.
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@ -13,7 +13,6 @@ PLAT_INCLUDE_BASE := $(MARVELL_PLAT_INCLUDE_BASE)/$(PLAT_FAMILY)
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PLAT_COMMON_BASE := $(PLAT_FAMILY_BASE)/common
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MARVELL_DRV_BASE := drivers/marvell
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MARVELL_COMMON_BASE := $(MARVELL_PLAT_BASE)/common
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HANDLE_EA_EL3_FIRST := 1
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include plat/marvell/marvell.mk
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@ -53,7 +52,6 @@ BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \
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$(PLAT_COMMON_BASE)/dram_win.c \
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$(PLAT_COMMON_BASE)/io_addr_dec.c \
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$(PLAT_COMMON_BASE)/marvell_plat_config.c \
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$(PLAT_COMMON_BASE)/a3700_ea.c \
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$(PLAT_FAMILY_BASE)/$(PLAT)/plat_bl31_setup.c \
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$(MARVELL_COMMON_BASE)/marvell_cci.c \
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$(MARVELL_COMMON_BASE)/marvell_ddr_info.c \
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@ -63,6 +61,10 @@ BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \
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$(PLAT_COMMON_BASE)/a3700_sip_svc.c \
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$(MARVELL_DRV)
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ifeq ($(HANDLE_EA_EL3_FIRST),1)
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BL31_SOURCES += $(PLAT_COMMON_BASE)/a3700_ea.c
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endif
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ifeq ($(CM3_SYSTEM_RESET),1)
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BL31_SOURCES += $(PLAT_COMMON_BASE)/cm3_system_reset.c
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endif
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@ -8,14 +8,79 @@
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#include <common/debug.h>
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#include <arch_helpers.h>
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#include <plat/common/platform.h>
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#include <bl31/ea_handle.h>
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#define ADVK_SERROR_SYNDROME 0xbf000002
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#define A53_SERR_INT_AXI_SLVERR_ON_EXTERNAL_ACCESS 0xbf000002
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#if !ENABLE_BACKTRACE
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static const char *get_el_str(unsigned int el)
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{
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if (el == MODE_EL3) {
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return "EL3";
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} else if (el == MODE_EL2) {
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return "EL2";
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}
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return "S-EL1";
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}
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#endif /* !ENABLE_BACKTRACE */
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/*
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* This source file with custom plat_ea_handler function is compiled only when
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* building TF-A with compile option HANDLE_EA_EL3_FIRST=1
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*/
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void plat_ea_handler(unsigned int ea_reason, uint64_t syndrome, void *cookie,
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void *handle, uint64_t flags)
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{
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if (syndrome == ADVK_SERROR_SYNDROME)
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unsigned int level = (unsigned int)GET_EL(read_spsr_el3());
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/*
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* Asynchronous External Abort with syndrome 0xbf000002 on Cortex A53
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* core means SError interrupt caused by AXI SLVERR on external access.
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*
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* In most cases this indicates a bug in U-Boot or Linux kernel driver
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* pci-aardvark.c which implements access to A3700 PCIe config space.
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* Driver does not wait for PCIe PIO transfer completion and try to
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* start a new PCIe PIO transfer while previous has not finished yet.
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* A3700 PCIe controller in this case sends SLVERR via AXI which results
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* in a fatal Asynchronous SError interrupt on Cortex A53 CPU.
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*
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* Following patches fix that bug in U-Boot and Linux kernel drivers:
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* https://source.denx.de/u-boot/u-boot/-/commit/eccbd4ad8e4e182638eafbfb87ac139c04f24a01
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* https://git.kernel.org/stable/c/f18139966d072dab8e4398c95ce955a9742e04f7
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*
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* As a hacky workaround for unpatched U-Boot and Linux kernel drivers
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* ignore all asynchronous aborts with that syndrome value received on
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* CPU from level lower than EL3.
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*
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* Because these aborts are delivered on CPU asynchronously, they are
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* imprecise and we cannot check the real reason of abort and neither
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* who and why sent this abort. We expect that on A3700 it is always
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* PCIe controller.
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*
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* Hence ignoring all aborts with this syndrome value is just a giant
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* hack that we need only because of bugs in old U-Boot and Linux kernel
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* versions and because it was decided that TF-A would implement this
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* hack for U-Boot and Linux kernel it in this way. New patched U-Boot
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* and kernel versions do not need it anymore.
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*
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* Links to discussion about this workaround:
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* https://lore.kernel.org/linux-pci/20190316161243.29517-1-repk@triplefau.lt/
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* https://lore.kernel.org/linux-pci/971be151d24312cc533989a64bd454b4@www.loen.fr/
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* https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/1541
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*/
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if (level < MODE_EL3 && ea_reason == ERROR_EA_ASYNC &&
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syndrome == A53_SERR_INT_AXI_SLVERR_ON_EXTERNAL_ACCESS) {
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ERROR_NL();
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ERROR("Ignoring Asynchronous External Abort with"
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" syndrome 0x%llx received on 0x%lx from %s\n",
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syndrome, read_mpidr_el1(), get_el_str(level));
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ERROR("SError interrupt: AXI SLVERR on external access\n");
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ERROR("This indicates a bug in pci-aardvark.c driver\n");
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ERROR("Please update U-Boot/Linux to the latest version\n");
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ERROR_NL();
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console_flush();
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return;
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}
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plat_default_ea_handler(ea_reason, syndrome, cookie, handle, flags);
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}
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