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chore(cm): reorganise sctlr_el1 and tcr_el1 ctx code

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SCTLR_EL1 and TCR_EL1 regs are included either as part of errata
"ERRATA_SPECULATIVE_AT" or under el1_sysregs_t context structure.
The code to write and read into these context entries, looks
repetitive and is invoked at most places.
This section is refactored to bring them under a static procedure,
keeping the code neat and easier to maintain.

Change-Id: Ib0d8c51bee09e1600c5baaa7f9745083dca9fee1
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
This commit is contained in:
Jayanth Dodderi Chidanand 2024-07-30 17:04:23 +01:00
parent 4b6e4e618e
commit a0d9a973a4
5 changed files with 49 additions and 63 deletions
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40
include/lib/el3_runtime/aarch64/context.h
View file

@ -356,6 +356,46 @@ void fpregs_context_save(simd_regs_t *regs);
void fpregs_context_restore(simd_regs_t *regs);
#endif
static inline void write_ctx_sctlr_el1_reg_errata(cpu_context_t *ctx, u_register_t val)
{
#if (ERRATA_SPECULATIVE_AT)
write_ctx_reg(get_errata_speculative_at_ctx(ctx),
CTX_ERRATA_SPEC_AT_SCTLR_EL1, val);
#else
write_el1_ctx_common(get_el1_sysregs_ctx(ctx), sctlr_el1, val);
#endif /* ERRATA_SPECULATIVE_AT */
}
static inline void write_ctx_tcr_el1_reg_errata(cpu_context_t *ctx, u_register_t val)
{
#if (ERRATA_SPECULATIVE_AT)
write_ctx_reg(get_errata_speculative_at_ctx(ctx),
CTX_ERRATA_SPEC_AT_TCR_EL1, val);
#else
write_el1_ctx_common(get_el1_sysregs_ctx(ctx), tcr_el1, val);
#endif /* ERRATA_SPECULATIVE_AT */
}
static inline u_register_t read_ctx_sctlr_el1_reg_errata(cpu_context_t *ctx)
{
#if (ERRATA_SPECULATIVE_AT)
return read_ctx_reg(get_errata_speculative_at_ctx(ctx),
CTX_ERRATA_SPEC_AT_SCTLR_EL1);
#else
return read_el1_ctx_common(get_el1_sysregs_ctx(ctx), sctlr_el1);
#endif /* ERRATA_SPECULATIVE_AT */
}
static inline u_register_t read_ctx_tcr_el1_reg_errata(cpu_context_t *ctx)
{
#if (ERRATA_SPECULATIVE_AT)
return read_ctx_reg(get_errata_speculative_at_ctx(ctx),
CTX_ERRATA_SPEC_AT_TCR_EL1);
#else
return read_el1_ctx_common(get_el1_sysregs_ctx(ctx), tcr_el1);
#endif /* ERRATA_SPECULATIVE_AT */
}
#endif /* __ASSEMBLER__ */
#endif /* CONTEXT_H */

6
lib/el3_runtime/aarch64/context_mgmt.c
View file

@ -96,11 +96,7 @@ static void setup_el1_context(cpu_context_t *ctx, const struct entry_point_info
#endif
/* Store the initialised SCTLR_EL1 value in the cpu_context */
#if (ERRATA_SPECULATIVE_AT)
write_ctx_reg(get_errata_speculative_at_ctx(ctx), CTX_ERRATA_SPEC_AT_SCTLR_EL1, sctlr_elx);
#else
write_el1_ctx_common(get_el1_sysregs_ctx(ctx), sctlr_el1, sctlr_elx);
#endif /* ERRATA_SPECULATIVE_AT */
write_ctx_sctlr_el1_reg_errata(ctx, sctlr_elx);
/*
* Base the context ACTLR_EL1 on the current value, as it is

19
plat/arm/board/neoverse_rd/common/ras/nrd_ras_cpu.c
View file

@ -73,29 +73,14 @@ static void populate_cpu_err_data(cpu_err_info *cpu_info,
mair_el1);
cpu_info->ErrCtxEl1Reg[5] = read_midr_el1();
cpu_info->ErrCtxEl1Reg[6] = read_mpidr_el1();
#if (ERRATA_SPECULATIVE_AT)
cpu_info->ErrCtxEl1Reg[7] = read_ctx_reg(get_errata_speculative_at_ctx(ctx),
CTX_ERRATA_SPEC_AT_SCTLR_EL1);
#else
cpu_info->ErrCtxEl1Reg[7] = read_el1_ctx_common(get_el1_sysregs_ctx(ctx),
sctlr_el1);
#endif /* ERRATA_SPECULATIVE_AT */
cpu_info->ErrCtxEl1Reg[7] = read_ctx_sctlr_el1_reg_errata(ctx);
cpu_info->ErrCtxEl1Reg[8] = read_ctx_reg(get_gpregs_ctx(ctx),
CTX_GPREG_SP_EL0);
cpu_info->ErrCtxEl1Reg[9] = read_el1_ctx_common(get_el1_sysregs_ctx(ctx),
sp_el1);
cpu_info->ErrCtxEl1Reg[10] = read_el1_ctx_common(get_el1_sysregs_ctx(ctx),
spsr_el1);
#if (ERRATA_SPECULATIVE_AT)
cpu_info->ErrCtxEl1Reg[11] = read_ctx_reg(get_errata_speculative_at_ctx(ctx),
CTX_ERRATA_SPEC_AT_TCR_EL1);
#else
cpu_info->ErrCtxEl1Reg[11] = read_el1_ctx_common(get_el1_sysregs_ctx(ctx),
tcr_el1);
#endif /* ERRATA_SPECULATIVE_AT */
cpu_info->ErrCtxEl1Reg[11] = read_ctx_tcr_el1_reg_errata(ctx);
cpu_info->ErrCtxEl1Reg[12] = read_el1_ctx_common(get_el1_sysregs_ctx(ctx),
tpidr_el0);
cpu_info->ErrCtxEl1Reg[13] = read_el1_ctx_common(get_el1_sysregs_ctx(ctx),

23
services/std_svc/spm/el3_spmc/spmc_setup.c
View file

@ -322,14 +322,7 @@ static void spmc_el0_sp_setup_mmu(struct secure_partition_desc *sp,
write_el1_ctx_common(get_el1_sysregs_ctx(ctx), mair_el1,
mmu_cfg_params[MMU_CFG_MAIR]);
/* Store the initialised SCTLR_EL1 value in the cpu_context */
#if (ERRATA_SPECULATIVE_AT)
write_ctx_reg(get_errata_speculative_at_ctx(ctx),
CTX_ERRATA_SPEC_AT_TCR_EL1, mmu_cfg_params[MMU_CFG_TCR]);
#else
write_el1_ctx_common(get_el1_sysregs_ctx(ctx), tcr_el1,
mmu_cfg_params[MMU_CFG_TCR]);
#endif /* ERRATA_SPECULATIVE_AT */
write_ctx_tcr_el1_reg_errata(ctx, mmu_cfg_params[MMU_CFG_TCR]);
write_el1_ctx_common(get_el1_sysregs_ctx(ctx), ttbr0_el1,
mmu_cfg_params[MMU_CFG_TTBR0]);
@ -340,12 +333,7 @@ static void spmc_el0_sp_setup_sctlr_el1(cpu_context_t *ctx)
u_register_t sctlr_el1_val;
/* Setup SCTLR_EL1 */
#if (ERRATA_SPECULATIVE_AT)
sctlr_el1_val = read_ctx_reg(get_errata_speculative_at_ctx(ctx),
CTX_ERRATA_SPEC_AT_SCTLR_EL1);
#else
sctlr_el1_val = read_el1_ctx_common(get_el1_sysregs_ctx(ctx), sctlr_el1);
#endif /* ERRATA_SPECULATIVE_AT */
sctlr_el1_val = read_ctx_sctlr_el1_reg_errata(ctx);
sctlr_el1_val |=
/*SCTLR_EL1_RES1 |*/
@ -381,12 +369,7 @@ static void spmc_el0_sp_setup_sctlr_el1(cpu_context_t *ctx)
);
/* Store the initialised SCTLR_EL1 value in the cpu_context */
#if (ERRATA_SPECULATIVE_AT)
write_ctx_reg(get_errata_speculative_at_ctx(ctx),
CTX_ERRATA_SPEC_AT_SCTLR_EL1, sctlr_el1_val);
#else
write_el1_ctx_common(get_el1_sysregs_ctx(ctx), sctlr_el1, sctlr_el1_val);
#endif /* ERRATA_SPECULATIVE_AT */
write_ctx_sctlr_el1_reg_errata(ctx, sctlr_el1_val);
}
static void spmc_el0_sp_setup_system_registers(struct secure_partition_desc *sp,

24
services/std_svc/spm/spm_mm/spm_mm_setup.c
View file

@ -124,26 +124,13 @@ void spm_sp_setup(sp_context_t *sp_ctx)
write_el1_ctx_common(get_el1_sysregs_ctx(ctx), mair_el1,
mmu_cfg_params[MMU_CFG_MAIR]);
/* Store the initialised SCTLR_EL1 value in the cpu_context */
#if (ERRATA_SPECULATIVE_AT)
write_ctx_reg(get_errata_speculative_at_ctx(ctx),
CTX_ERRATA_SPEC_AT_TCR_EL1, mmu_cfg_params[MMU_CFG_TCR]);
#else
write_el1_ctx_common(get_el1_sysregs_ctx(ctx), tcr_el1,
mmu_cfg_params[MMU_CFG_TCR]);
#endif /* ERRATA_SPECULATIVE_AT */
write_ctx_tcr_el1_reg_errata(ctx, mmu_cfg_params[MMU_CFG_TCR]);
write_el1_ctx_common(get_el1_sysregs_ctx(ctx), ttbr0_el1,
mmu_cfg_params[MMU_CFG_TTBR0]);
/* Setup SCTLR_EL1 */
#if (ERRATA_SPECULATIVE_AT)
sctlr_el1_val = read_ctx_reg(get_errata_speculative_at_ctx(ctx),
CTX_ERRATA_SPEC_AT_SCTLR_EL1);
#else
sctlr_el1_val = read_el1_ctx_common(get_el1_sysregs_ctx(ctx), sctlr_el1);
#endif /* ERRATA_SPECULATIVE_AT */
sctlr_el1_val = read_ctx_sctlr_el1_reg_errata(ctx);
sctlr_el1_val |=
/*SCTLR_EL1_RES1 |*/
@ -180,12 +167,7 @@ void spm_sp_setup(sp_context_t *sp_ctx)
);
/* Store the initialised SCTLR_EL1 value in the cpu_context */
#if (ERRATA_SPECULATIVE_AT)
write_ctx_reg(get_errata_speculative_at_ctx(ctx),
CTX_ERRATA_SPEC_AT_SCTLR_EL1, sctlr_el1_val);
#else
write_el1_ctx_common(get_el1_sysregs_ctx(ctx), sctlr_el1, sctlr_el1_val);
#endif /* ERRATA_SPECULATIVE_AT */
write_ctx_sctlr_el1_reg_errata(ctx, sctlr_el1_val);
/*
* Setup other system registers