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Pass more -D options to BL*_CPPFLAGS instead of BL*_CFLAGS

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Commit d5e97a1d2c ("Build: define IMAGE_AT_EL1 or IMAGE_AT_EL3
globally for C files") does not have commit 848a7e8ce1 ("Build:
introduce per-BL CPPFLAGS and ASFLAGS") as an ancestor because
they were pulled almost at the same time.

This is a follow-up conversion to be consistent with commit
11a3c5ee73 ("plat: pass -D option to BL*_CPPFLAGS instead of
BL*_CFLAGS").

With this change, the command line option, IMAGE_AT_EL3, will be
passed to .S files as well.

I remove the definition in include/lib/cpus/aarch64/cpu_macros.S

Otherwise, the following error would happen.

  include/lib/cpus/aarch64/cpu_macros.S:29:0: error: "IMAGE_AT_EL3" redefined [-Werror]

Change-Id: I943c8f22356483c2ae3c57b515c69243a8fa6889
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Masahiro Yamada 2020-04-01 14:20:58 +09:00
parent 61903ad777
commit 9cefb4b194
3 changed files with 8 additions and 12 deletions
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12
Makefile
View file

@ -537,15 +537,15 @@ endif
endif
ifeq (${ARCH},aarch64)
BL1_CFLAGS += -DIMAGE_AT_EL3
BL1_CPPFLAGS += -DIMAGE_AT_EL3
ifeq ($(BL2_AT_EL3),1)
BL2_CFLAGS += -DIMAGE_AT_EL3
BL2_CPPFLAGS += -DIMAGE_AT_EL3
else
BL2_CFLAGS += -DIMAGE_AT_EL1
BL2_CPPFLAGS += -DIMAGE_AT_EL1
endif
BL2U_CFLAGS += -DIMAGE_AT_EL1
BL31_CFLAGS += -DIMAGE_AT_EL3
BL32_CFLAGS += -DIMAGE_AT_EL1
BL2U_CPPFLAGS += -DIMAGE_AT_EL1
BL31_CPPFLAGS += -DIMAGE_AT_EL3
BL32_CPPFLAGS += -DIMAGE_AT_EL1
endif
# Include the CPU specific operations makefile, which provides default

4
include/lib/cpus/aarch64/cpu_macros.S
View file

@ -25,10 +25,6 @@
/* Word size for 64-bit CPUs */
#define CPU_WORD_SIZE 8
#if defined(IMAGE_BL1) || defined(IMAGE_BL31) ||(defined(IMAGE_BL2) && BL2_AT_EL3)
#define IMAGE_AT_EL3
#endif
/*
* Whether errata status needs reporting. Errata status is printed in debug
* builds for both BL1 and BL31 images.

4
plat/socionext/uniphier/platform.mk
View file

@ -17,8 +17,8 @@ override ENABLE_PIE := 1
ALLOW_RO_XLAT_TABLES := 1
ifeq ($(ALLOW_RO_XLAT_TABLES),1)
BL31_CFLAGS += -DPLAT_RO_XLAT_TABLES=1
BL32_CFLAGS += -DPLAT_RO_XLAT_TABLES=1
BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES=1
BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES=1
endif
# Cortex-A53 revision r0p4-51rel0