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https://github.com/ARM-software/arm-trusted-firmware.git
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refactor(st): update test for closed chip
The function stm32mp_is_closed_device() is replaced with stm32mp_check_closed_device(), which return an uint32_t, either STM32MP_CHIP_SEC_OPEN or STM32MP_CHIP_SEC_CLOSED. Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: Ie0790cdc36c4b6522083bc1f0e7c38e8061e6adf
This commit is contained in:
parent
c706104507
commit
9cd784db55
6 changed files with 29 additions and 19 deletions
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@ -824,7 +824,7 @@ uint32_t bsec_get_secure_state(void)
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result = BSEC_STATE_INVALID;
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} else {
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if ((status & BSEC_OTP_STATUS_SECURE) != 0U) {
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if (stm32mp_is_closed_device()) {
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if (stm32mp_check_closed_device() == STM32MP_CHIP_SEC_CLOSED) {
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result = BSEC_STATE_SEC_CLOSED;
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} else {
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result = BSEC_STATE_SEC_OPEN;
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2018-2023, STMicroelectronics - All Rights Reserved
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* Copyright (C) 2018-2024, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -14,6 +14,9 @@
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#define JEDEC_ST_BKID U(0x0)
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#define JEDEC_ST_MFID U(0x20)
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#define STM32MP_CHIP_SEC_CLOSED U(0x34D9CCC5)
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#define STM32MP_CHIP_SEC_OPEN U(0xA764D182)
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/* FWU configuration (max supported value is 15) */
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#define FWU_MAX_TRIAL_REBOOT U(3)
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@ -23,8 +26,8 @@ uintptr_t stm32mp_get_boot_ctx_address(void);
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uint16_t stm32mp_get_boot_itf_selected(void);
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bool stm32mp_is_single_core(void);
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bool stm32mp_is_closed_device(void);
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bool stm32mp_is_auth_supported(void);
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uint32_t stm32mp_check_closed_device(void);
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/* Return the base address of the DDR controller */
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uintptr_t stm32mp_ddrctrl_base(void);
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2022-2023, STMicroelectronics - All Rights Reserved
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* Copyright (c) 2022-2024, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -58,7 +58,8 @@ static void crypto_lib_init(void)
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panic();
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}
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if (stm32mp_is_closed_device() || stm32mp_is_auth_supported()) {
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if ((stm32mp_check_closed_device() == STM32MP_CHIP_SEC_CLOSED) ||
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stm32mp_is_auth_supported()) {
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#if STM32MP_CRYPTO_ROM_LIB
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boot_context = (boot_api_context_t *)stm32mp_get_boot_ctx_address();
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auth_ops.verify_signature = boot_context->bootrom_ecdsa_verify_signature;
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@ -322,7 +323,8 @@ static int crypto_verify_signature(void *data_ptr, unsigned int data_len,
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size_t bignum_len = sizeof(sig) / 2U;
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unsigned int seq_num = 0U;
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if (!stm32mp_is_closed_device() && !stm32mp_is_auth_supported()) {
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if ((stm32mp_check_closed_device() == STM32MP_CHIP_SEC_OPEN) &&
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!stm32mp_is_auth_supported()) {
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return CRYPTO_SUCCESS;
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}
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2022, STMicroelectronics - All Rights Reserved
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* Copyright (c) 2022-2024, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -67,14 +67,14 @@ static int copy_hash_from_otp(const char *otp_name, uint8_t *hash, size_t len)
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* Check if key hash values in OTP are 0 or 0xFFFFFFFFF
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* programmed : Invalid Key
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*/
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if (!stm32mp_is_closed_device() && !valid) {
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if ((stm32mp_check_closed_device() == STM32MP_CHIP_SEC_OPEN) && !valid) {
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if ((tmp != 0U) && (tmp != 0xFFFFFFFFU) && (tmp != first)) {
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valid = true;
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}
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}
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}
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if (!stm32mp_is_closed_device() && !valid) {
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if ((stm32mp_check_closed_device() == STM32MP_CHIP_SEC_OPEN) && !valid) {
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return 0;
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}
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@ -163,7 +163,7 @@ int plat_get_rotpk_info(void *cookie, void **key_ptr, unsigned int *key_len,
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*key_ptr = &root_pk_hash;
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*flags = ROTPK_IS_HASH;
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if ((res == 0) && !stm32mp_is_closed_device()) {
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if ((res == 0) && (stm32mp_check_closed_device() == STM32MP_CHIP_SEC_OPEN)) {
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*flags |= ROTPK_NOT_DEPLOYED;
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}
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -318,7 +318,7 @@ void bl2_el3_plat_arch_setup(void)
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skip_console_init:
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#if !TRUSTED_BOARD_BOOT
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if (stm32mp_is_closed_device()) {
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if (stm32mp_check_closed_device() == STM32MP_CHIP_SEC_CLOSED) {
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/* Closed chip mandates authentication */
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ERROR("Secure chip: TRUSTED_BOARD_BOOT must be enabled\n");
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panic();
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@ -347,7 +347,7 @@ skip_console_init:
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stm32_iwdg_refresh();
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if (bsec_read_debug_conf() != 0U) {
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if (stm32mp_is_closed_device()) {
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if (stm32mp_check_closed_device() == STM32MP_CHIP_SEC_CLOSED) {
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#if DEBUG
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WARN("\n%s", debug_msg);
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#else
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -531,12 +531,12 @@ bool stm32mp_is_single_core(void)
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}
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/* Return true when device is in closed state */
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bool stm32mp_is_closed_device(void)
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uint32_t stm32mp_check_closed_device(void)
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{
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uint32_t value;
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if (stm32_get_otp_value(CFG0_OTP, &value) != 0) {
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return true;
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return STM32MP_CHIP_SEC_CLOSED;
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}
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#if STM32MP13
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@ -544,17 +544,22 @@ bool stm32mp_is_closed_device(void)
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switch (value) {
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case CFG0_OPEN_DEVICE:
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return false;
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return STM32MP_CHIP_SEC_OPEN;
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case CFG0_CLOSED_DEVICE:
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case CFG0_CLOSED_DEVICE_NO_BOUNDARY_SCAN:
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case CFG0_CLOSED_DEVICE_NO_JTAG:
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return true;
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return STM32MP_CHIP_SEC_CLOSED;
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default:
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panic();
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}
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#endif
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#if STM32MP15
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return (value & CFG0_CLOSED_DEVICE) == CFG0_CLOSED_DEVICE;
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if ((value & CFG0_CLOSED_DEVICE) == CFG0_CLOSED_DEVICE) {
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return STM32MP_CHIP_SEC_CLOSED;
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} else {
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return STM32MP_CHIP_SEC_OPEN;
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}
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#endif
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}
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