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uniphier: allocate xlat region of on-chip SRAM only when needed

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Currently, the xlat region of the on-chip SRAM is always allocated
for all BL images.

The access to the on-chip SRAM is necessary for loading images from
a USB memory device (i.e. when updating firmware), so unneeded for
the usual boot procedure.

To avoid this waste, allocate the xlat region dynamically only for
BL2, and only when it is necessary.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Masahiro Yamada 2018-01-30 19:30:39 +09:00
parent 7e51ca8daf
commit 9c740a58e1
2 changed files with 15 additions and 12 deletions
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15
plat/socionext/uniphier/uniphier_io_storage.c
View file

@ -21,6 +21,9 @@
#define UNIPHIER_ROM_REGION_BASE 0x00000000
#define UNIPHIER_ROM_REGION_SIZE 0x10000000
#define UNIPHIER_OCM_REGION_BASE 0x30000000
#define UNIPHIER_OCM_REGION_SIZE 0x00040000
static const io_dev_connector_t *uniphier_fip_dev_con;
static uintptr_t uniphier_fip_dev_handle;
@ -271,6 +274,18 @@ static int uniphier_io_usb_setup(unsigned int soc_id)
if (ret)
return ret;
/*
* on-chip SRAM region: should be DEVICE attribute because the USB
* load functions provided by the ROM use this memory region as a work
* area, but do not cater to cache coherency.
*/
ret = mmap_add_dynamic_region(UNIPHIER_OCM_REGION_BASE,
UNIPHIER_OCM_REGION_BASE,
UNIPHIER_OCM_REGION_SIZE,
MT_DEVICE | MT_RW | MT_SECURE);
if (ret)
return ret;
ret = uniphier_usb_init(soc_id, &block_dev_spec);
if (ret)
return ret;

12
plat/socionext/uniphier/uniphier_xlat_setup.c
View file

@ -8,9 +8,6 @@
#include <platform_def.h>
#include <xlat_tables_v2.h>
#define UNIPHIER_OCM_REGION_BASE 0x30000000
#define UNIPHIER_OCM_REGION_SIZE 0x00040000
#define UNIPHIER_REG_REGION_BASE 0x50000000
#define UNIPHIER_REG_REGION_SIZE 0x20000000
@ -37,15 +34,6 @@ void uniphier_mmap_setup(uintptr_t total_base, size_t total_size,
BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE,
MT_DEVICE | MT_RW | MT_SECURE);
/*
* on-chip SRAM region: should be DEVICE attribute because the USB
* load functions provided by the ROM use this memory region as a work
* area, but do not cater to cache coherency.
*/
mmap_add_region(UNIPHIER_OCM_REGION_BASE, UNIPHIER_OCM_REGION_BASE,
UNIPHIER_OCM_REGION_SIZE,
MT_DEVICE | MT_RW | MT_SECURE);
/* register region */
mmap_add_region(UNIPHIER_REG_REGION_BASE, UNIPHIER_REG_REGION_BASE,
UNIPHIER_REG_REGION_SIZE,