mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-16 09:34:18 +00:00
feat(arm): support FW handoff b/w BL1 & BL2
Leverage the framework between BL1 and BL2. Migrate all handoff structures to the TL. Change-Id: I79ff3a319596b5656184cde10b5204b10a4d03bb Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
This commit is contained in:
parent
469b1d8412
commit
9c11ed7e3e
5 changed files with 140 additions and 26 deletions
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@ -411,6 +411,8 @@ MEASURED_BOOT
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#define ARM_V2M_MAP_MEM_PROTECT MAP_REGION_FLAT(PLAT_ARM_MEM_PROT_ADDR, \
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V2M_FLASH_BLOCK_SIZE, \
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MT_DEVICE | MT_RW | MT_SECURE)
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#if !TRANSFER_LIST
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/*
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* Map the region for device tree configuration with read and write permissions
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*/
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@ -418,6 +420,8 @@ MEASURED_BOOT
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(ARM_FW_CONFIGS_LIMIT \
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- ARM_BL_RAM_BASE), \
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MT_MEMORY | MT_RW | EL3_PAS)
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#endif
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/*
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* Map L0_GPT with read and write permissions
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*/
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@ -505,6 +509,14 @@ MEASURED_BOOT
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*/
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#define CACHE_WRITEBACK_GRANULE (U(1) << ARM_CACHE_WRITEBACK_SHIFT)
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/* Define memory configuration for trusted boot device tree files. */
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#ifdef PLAT_ARM_TB_FW_CONFIG_SIZE
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#define ARM_TB_FW_CONFIG_MAX_SIZE PLAT_ARM_TB_FW_CONFIG_SIZE
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#else
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#define ARM_TB_FW_CONFIG_MAX_SIZE U(0x400)
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#endif
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#if !TRANSFER_LIST
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/*
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* To enable FW_CONFIG to be loaded by BL1, define the corresponding base
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* and limit. Leave enough space of BL2 meminfo.
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@ -526,6 +538,7 @@ MEASURED_BOOT
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*/
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#define ARM_FW_CONFIGS_SIZE (PAGE_SIZE * 2)
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#define ARM_FW_CONFIGS_LIMIT (ARM_BL_RAM_BASE + ARM_FW_CONFIGS_SIZE)
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#endif
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#if ENABLE_RME
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/*
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@ -48,6 +48,11 @@ static const arm_gpt_info_t arm_gpt_info = {
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void bl2_early_platform_setup2(u_register_t arg0, u_register_t arg1, u_register_t arg2, u_register_t arg3)
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{
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struct transfer_list_entry *te __unused;
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#if TRANSFER_LIST
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arg0 = arg3;
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#endif
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arm_bl2_early_platform_setup((uintptr_t)arg0, (meminfo_t *)arg1);
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/* Initialize the platform config for future decision making */
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@ -336,7 +336,6 @@ endif
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# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env)
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ifdef UNIX_MK
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FVP_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
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FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
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FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts
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@ -345,7 +344,6 @@ $(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS
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ifeq (${TRANSFER_LIST}, 1)
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FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \
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${PLAT}_fw_config.dts \
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${PLAT}_tb_fw_config.dts \
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)
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else
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@ -356,7 +354,7 @@ FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \
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${PLAT}_nt_fw_config.dts \
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)
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FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
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FVP_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
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FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb
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FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
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@ -381,14 +379,14 @@ FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_
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$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_FW_CONFIG}))
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endif
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# Add the FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FVP_FW_CONFIG},--fw-config,${FVP_FW_CONFIG}))
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# Add the SOC_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config,${FVP_SOC_FW_CONFIG}))
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# Add the NT_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG}))
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endif
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# Add the FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FVP_FW_CONFIG},--fw-config,${FVP_FW_CONFIG}))
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# Add the TB_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config,${FVP_TB_FW_CONFIG}))
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# Add the HW_CONFIG to FIP and specify the same to certtool
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2022, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -14,6 +14,9 @@
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#include <common/debug.h>
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#include <lib/fconf/fconf.h>
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#include <lib/fconf/fconf_dyn_cfg_getter.h>
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#if TRANSFER_LIST
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#include <lib/transfer_list.h>
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#endif
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#include <lib/utils.h>
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#include <lib/xlat_tables/xlat_tables_compat.h>
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#include <plat/arm/common/plat_arm.h>
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@ -61,6 +64,10 @@ static meminfo_t bl1_tzram_layout;
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/* Boolean variable to hold condition whether firmware update needed or not */
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static bool is_fwu_needed;
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#if TRANSFER_LIST
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static struct transfer_list_header *secure_tl;
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#endif
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struct meminfo *bl1_plat_sec_mem_layout(void)
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{
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return &bl1_tzram_layout;
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@ -144,9 +151,13 @@ void bl1_plat_arch_setup(void)
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*/
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void arm_bl1_platform_setup(void)
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{
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const struct dyn_cfg_dtb_info_t *fw_config_info;
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const struct dyn_cfg_dtb_info_t *config_info __unused;
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uint32_t fw_config_max_size __unused;
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image_info_t config_image_info __unused;
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struct transfer_list_entry *te __unused;
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image_desc_t *desc;
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uint32_t fw_config_max_size;
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int err = -1;
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/* Initialise the IO layer and register platform IO devices */
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@ -159,6 +170,37 @@ void arm_bl1_platform_setup(void)
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return;
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}
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#if TRANSFER_LIST
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secure_tl = transfer_list_init((void *)PLAT_ARM_EL3_FW_HANDOFF_BASE,
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PLAT_ARM_FW_HANDOFF_SIZE);
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if (secure_tl == NULL) {
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ERROR("Secure transfer list initialisation failed!\n");
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panic();
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}
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te = transfer_list_add(secure_tl, TL_TAG_TB_FW_CONFIG,
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ARM_TB_FW_CONFIG_MAX_SIZE, NULL);
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assert(te != NULL);
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/*
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* Set the load address of TB_FW_CONFIG in the data section of the TE just
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* allocated in the secure transfer list.
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*/
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SET_PARAM_HEAD(&config_image_info, PARAM_IMAGE_BINARY, VERSION_2, 0);
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config_image_info.image_base = (uintptr_t)transfer_list_entry_data(te);
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config_image_info.image_max_size = te->data_size;
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VERBOSE("FCONF: Loading config with image ID: %u\n", TB_FW_CONFIG_ID);
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err = load_auth_image(TB_FW_CONFIG_ID, &config_image_info);
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if (err != 0) {
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VERBOSE("Failed to load config %u\n", TB_FW_CONFIG_ID);
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plat_error_handler(err);
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}
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transfer_list_update_checksum(secure_tl);
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fconf_populate("TB_FW", (uintptr_t)transfer_list_entry_data(te));
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#else
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/* Set global DTB info for fixed fw_config information */
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fw_config_max_size = ARM_FW_CONFIG_LIMIT - ARM_FW_CONFIG_BASE;
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set_config_info(ARM_FW_CONFIG_BASE, ~0UL, fw_config_max_size, FW_CONFIG_ID);
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* FW_CONFIG loaded successfully. If FW_CONFIG device tree parsing
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* is successful then load TB_FW_CONFIG device tree.
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*/
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fw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, FW_CONFIG_ID);
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if (fw_config_info != NULL) {
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err = fconf_populate_dtb_registry(fw_config_info->config_addr);
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config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, FW_CONFIG_ID);
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if (config_info != NULL) {
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err = fconf_populate_dtb_registry(config_info->config_addr);
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if (err < 0) {
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ERROR("Parsing of FW_CONFIG failed %d\n", err);
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plat_error_handler(err);
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}
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/* load TB_FW_CONFIG */
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err = fconf_load_config(TB_FW_CONFIG_ID);
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if (err < 0) {
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ERROR("Invalid FW_CONFIG address\n");
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plat_error_handler(err);
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}
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#endif /* TRANSFER_LIST */
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/* The BL2 ep_info arg0 is modified to point to FW_CONFIG */
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desc = bl1_plat_get_image_desc(BL2_IMAGE_ID);
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#if TRANSFER_LIST
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transfer_list_set_handoff_args(secure_tl, &desc->ep_info);
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#else
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/* The BL2 ep_info arg0 is modified to point to FW_CONFIG */
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assert(desc != NULL);
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desc->ep_info.args.arg0 = fw_config_info->config_addr;
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desc->ep_info.args.arg0 = config_info->config_addr;
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#endif /* TRANSFER_LIST */
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#if CRYPTO_SUPPORT
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/* Share the Mbed TLS heap info with other images */
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{
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return is_fwu_needed ? NS_BL1U_IMAGE_ID : BL2_IMAGE_ID;
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}
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// Use the default implementation of this function when Firmware Handoff is
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// disabled to avoid duplicating its logic.
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#if TRANSFER_LIST
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int bl1_plat_handle_post_image_load(unsigned int image_id)
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{
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image_desc_t *image_desc __unused;
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assert(image_id == BL2_IMAGE_ID);
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struct transfer_list_entry *te;
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/* Convey this information to BL2 via its TL. */
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te = transfer_list_add(secure_tl, TL_TAG_SRAM_LAYOUT64,
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sizeof(meminfo_t), NULL);
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assert(te != NULL);
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bl1_plat_calc_bl2_layout(&bl1_tzram_layout,
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(meminfo_t *)transfer_list_entry_data(te));
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transfer_list_update_checksum(secure_tl);
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/**
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* Before exiting make sure the contents of the TL are flushed in case there's no
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* support for hardware cache coherency.
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*/
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flush_dcache_range((uintptr_t)secure_tl, secure_tl->size);
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return 0;
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}
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#endif /* TRANSFER_LIST*/
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static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
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/* Base address of fw_config received from BL1 */
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static uintptr_t config_base;
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static uintptr_t config_base __unused;
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/*
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* Check that BL2_BASE is above ARM_FW_CONFIG_LIMIT. This reserved page is
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* for `meminfo_t` data structure and fw_configs passed from BL1.
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*/
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#if TRANSFER_LIST
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CASSERT(BL2_BASE >= PLAT_ARM_EL3_FW_HANDOFF_BASE + PLAT_ARM_FW_HANDOFF_SIZE,
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assert_bl2_base_overflows);
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#else
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CASSERT(BL2_BASE >= ARM_FW_CONFIG_LIMIT, assert_bl2_base_overflows);
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#endif /* TRANSFER_LIST */
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/* Weak definitions may be overridden in specific ARM standard platform */
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#pragma weak bl2_early_platform_setup2
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void arm_bl2_early_platform_setup(uintptr_t fw_config,
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struct meminfo *mem_layout)
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{
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struct transfer_list_entry *te __unused;
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int __maybe_unused ret;
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/* Initialize the console to provide early debug support */
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arm_console_boot_init();
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#if TRANSFER_LIST
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// TODO: modify the prototype of this function fw_config != bl2_tl
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secure_tl = (struct transfer_list_header *)fw_config;
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te = transfer_list_find(secure_tl, TL_TAG_SRAM_LAYOUT64);
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assert(te != NULL);
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bl2_tzram_layout = *(meminfo_t *)transfer_list_entry_data(te);
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transfer_list_rem(secure_tl, te);
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#else
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config_base = fw_config;
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/* Setup the BL2 memory layout */
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bl2_tzram_layout = *mem_layout;
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config_base = fw_config;
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#endif
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/* Initialise the IO layer and register platform IO devices */
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plat_arm_io_setup();
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void bl2_plat_preload_setup(void)
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{
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#if TRANSFER_LIST
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secure_tl = transfer_list_init((void *)PLAT_ARM_EL3_FW_HANDOFF_BASE,
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PLAT_ARM_FW_HANDOFF_SIZE);
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if (secure_tl == NULL) {
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ERROR("Initialisation of secure transfer list failed!\n");
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panic();
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}
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arm_transfer_list_dyn_cfg_init(secure_tl);
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#else
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arm_bl2_dyn_cfg_init();
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ARM_MAP_ROMLIB_CODE,
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ARM_MAP_ROMLIB_DATA,
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#endif
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#if !TRANSFER_LIST
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ARM_MAP_BL_CONFIG_REGION,
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#endif /* TRANSFER_LIST */
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#if ENABLE_RME
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ARM_MAP_L0_GPT_REGION,
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#endif
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{0}
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{ 0 }
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};
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#if ENABLE_RME
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void bl2_plat_arch_setup(void)
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{
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const struct dyn_cfg_dtb_info_t *tb_fw_config_info;
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const struct dyn_cfg_dtb_info_t *tb_fw_config_info __unused;
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struct transfer_list_entry *te __unused;
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arm_bl2_plat_arch_setup();
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#if TRANSFER_LIST
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te = transfer_list_find(secure_tl, TL_TAG_TB_FW_CONFIG);
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assert(te != NULL);
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fconf_populate("TB_FW", (uintptr_t)transfer_list_entry_data(te));
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transfer_list_rem(secure_tl, te);
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#else
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/* Fill the properties struct with the info from the config dtb */
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fconf_populate("FW_CONFIG", config_base);
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assert(tb_fw_config_info != NULL);
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fconf_populate("TB_FW", tb_fw_config_info->config_addr);
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#endif
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}
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int arm_bl2_handle_post_image_load(unsigned int image_id)
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