mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-18 10:34:19 +00:00
Merge changes from topic "fix-imx8m-uart-domain-permission" into integration
* changes: fix(imx8m): ensure domain permissions for the console refactor(imx8m): replace UART base magic numbers with macros
This commit is contained in:
Madhukar Pappireddy
TrustedFirmware Code Review
commit
9bb2a0c337
10 changed files with 109 additions and 24 deletions
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@ -17,16 +17,16 @@ static struct imx_uart {
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} imx8m_uart_info[] = {
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{ /* UART 1 */
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.ccm_reg = 0x4490,
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.uart_base = 0x30860000,
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.uart_base = IMX_UART1_BASE,
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}, { /* UART 2 */
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.ccm_reg = 0x44a0,
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.uart_base = 0x30890000,
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.uart_base = IMX_UART2_BASE,
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}, { /* UART 3 */
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.ccm_reg = 0x44b0,
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.uart_base = 0x30880000,
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.uart_base = IMX_UART3_BASE,
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}, { /* UART 4 */
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.ccm_reg = 0x44c0,
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.uart_base = 0x30a60000,
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.uart_base = IMX_UART4_BASE,
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}
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};
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@ -62,7 +62,7 @@ static const struct aipstz_cfg aipstz[] = {
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{0},
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};
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static const struct imx_rdc_cfg rdc[] = {
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static struct imx_rdc_cfg rdc[] = {
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/* Master domain assignment */
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RDC_MDAn(RDC_MDA_M4, DID1),
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@ -164,14 +164,14 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
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imx_aipstz_init(aipstz);
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imx_rdc_init(rdc);
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imx_csu_init(csu_cfg);
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if (console_base == 0U) {
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console_base = imx8m_uart_get_base();
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}
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imx_rdc_init(rdc, console_base);
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imx_csu_init(csu_cfg);
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console_imx_uart_register(console_base, IMX_BOOT_UART_CLK_IN_HZ,
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IMX_CONSOLE_BAUDRATE, &console);
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/* This console is only used for boot stage */
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@ -85,6 +85,11 @@
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#define PLAT_CRASH_UART_CLK_IN_HZ 24000000
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#define IMX_CONSOLE_BAUDRATE 115200
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#define IMX_UART1_BASE U(0x30860000)
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#define IMX_UART2_BASE U(0x30890000)
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#define IMX_UART3_BASE U(0x30880000)
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#define IMX_UART4_BASE U(0x30a60000)
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#define IMX_AIPSTZ1 U(0x301f0000)
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#define IMX_AIPSTZ2 U(0x305f0000)
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#define IMX_AIPSTZ3 U(0x309f0000)
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@ -48,7 +48,7 @@ static const struct aipstz_cfg aipstz[] = {
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{0},
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};
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static const struct imx_rdc_cfg rdc[] = {
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static struct imx_rdc_cfg rdc[] = {
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/* Master domain assignment */
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RDC_MDAn(RDC_MDA_M7, DID1),
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@ -136,7 +136,11 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
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imx_aipstz_init(aipstz);
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imx_rdc_init(rdc);
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if (console_base == 0U) {
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console_base = imx8m_uart_get_base();
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}
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imx_rdc_init(rdc, console_base);
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imx_csu_init(csu_cfg);
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@ -152,10 +156,6 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
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val = mmio_read_32(IMX_IOMUX_GPR_BASE + 0x2c);
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mmio_write_32(IMX_IOMUX_GPR_BASE + 0x2c, val | 0x3DFF0000);
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if (console_base == 0U) {
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console_base = imx8m_uart_get_base();
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}
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console_imx_uart_register(console_base, IMX_BOOT_UART_CLK_IN_HZ,
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IMX_CONSOLE_BAUDRATE, &console);
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/* This console is only used for boot stage */
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@ -68,6 +68,11 @@
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#define PLAT_CRASH_UART_CLK_IN_HZ 24000000
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#define IMX_CONSOLE_BAUDRATE 115200
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#define IMX_UART1_BASE U(0x30860000)
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#define IMX_UART2_BASE U(0x30890000)
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#define IMX_UART3_BASE U(0x30880000)
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#define IMX_UART4_BASE U(0x30a60000)
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#define IMX_AIPSTZ1 U(0x301f0000)
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#define IMX_AIPSTZ2 U(0x305f0000)
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#define IMX_AIPSTZ3 U(0x309f0000)
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@ -49,7 +49,7 @@ static const struct aipstz_cfg aipstz[] = {
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{0},
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};
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static const struct imx_rdc_cfg rdc[] = {
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static struct imx_rdc_cfg rdc[] = {
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/* Master domain assignment */
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RDC_MDAn(RDC_MDA_M7, DID1),
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@ -166,7 +166,11 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
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imx_aipstz_init(aipstz);
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imx_rdc_init(rdc);
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if (console_base == 0U) {
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console_base = imx8m_uart_get_base();
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}
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imx_rdc_init(rdc, console_base);
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imx_csu_init(csu_cfg);
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@ -175,10 +179,6 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
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val = mmio_read_32(IMX_IOMUX_GPR_BASE + 0x2c);
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mmio_write_32(IMX_IOMUX_GPR_BASE + 0x2c, val | 0x3DFF0000);
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if (console_base == 0U) {
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console_base = imx8m_uart_get_base();
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}
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console_imx_uart_register(console_base, IMX_BOOT_UART_CLK_IN_HZ,
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IMX_CONSOLE_BAUDRATE, &console);
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/* This console is only used for boot stage */
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@ -86,6 +86,11 @@
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#define PLAT_CRASH_UART_CLK_IN_HZ 24000000
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#define IMX_CONSOLE_BAUDRATE 115200
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#define IMX_UART1_BASE U(0x30860000)
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#define IMX_UART2_BASE U(0x30890000)
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#define IMX_UART3_BASE U(0x30880000)
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#define IMX_UART4_BASE U(0x30a60000)
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#define IMX_AIPSTZ1 U(0x301f0000)
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#define IMX_AIPSTZ2 U(0x305f0000)
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#define IMX_AIPSTZ3 U(0x309f0000)
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@ -65,6 +65,11 @@
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#define PLAT_CRASH_UART_CLK_IN_HZ 25000000
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#define IMX_CONSOLE_BAUDRATE 115200
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#define IMX_UART1_BASE U(0x30860000)
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#define IMX_UART2_BASE U(0x30890000)
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#define IMX_UART3_BASE U(0x30880000)
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#define IMX_UART4_BASE U(0x30a60000)
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#define IMX_AIPS_BASE U(0x30200000)
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#define IMX_AIPS_SIZE U(0xC00000)
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#define IMX_AIPS1_BASE U(0x30200000)
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@ -4,13 +4,78 @@
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <errno.h>
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#include <lib/mmio.h>
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#include <imx_rdc.h>
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void imx_rdc_init(const struct imx_rdc_cfg *rdc_cfg)
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struct imx_uart {
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int index;
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unsigned int uart_base;
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};
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static const struct imx_uart imx8m_uart_info[] = {
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{ /* UART 1 */
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.index = RDC_PDAP_UART1,
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.uart_base = IMX_UART1_BASE,
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}, { /* UART 2 */
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.index = RDC_PDAP_UART2,
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.uart_base = IMX_UART2_BASE,
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}, { /* UART 3 */
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.index = RDC_PDAP_UART3,
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.uart_base = IMX_UART3_BASE,
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}, { /* UART 4 */
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.index = RDC_PDAP_UART4,
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.uart_base = IMX_UART4_BASE,
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}
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};
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static int imx_rdc_uart_get_pdap_index(unsigned int uart_base)
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{
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const struct imx_rdc_cfg *rdc = rdc_cfg;
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size_t i;
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for (i = 0; i < ARRAY_SIZE(imx8m_uart_info); i++) {
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if (imx8m_uart_info[i].uart_base == uart_base) {
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return imx8m_uart_info[i].index;
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}
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}
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return -ENODEV;
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}
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static void imx_rdc_console_access_enable(struct imx_rdc_cfg *rdc_cfg,
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unsigned int console_base)
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{
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struct imx_rdc_cfg *rdc;
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int console_pdap_index;
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console_pdap_index = imx_rdc_uart_get_pdap_index(console_base);
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if (console_pdap_index < 0) {
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return;
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}
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for (rdc = rdc_cfg; rdc->type != RDC_INVALID; rdc++) {
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if (rdc->type != RDC_PDAP || rdc->index != console_pdap_index) {
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continue;
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}
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if (rdc->index == console_pdap_index &&
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rdc->setting.rdc_pdap == (D0R | D0W)) {
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return;
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}
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if (rdc->index == console_pdap_index) {
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rdc->setting.rdc_pdap = D0R | D0W;
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}
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}
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}
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void imx_rdc_init(struct imx_rdc_cfg *rdc_cfg, unsigned int console_base)
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{
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struct imx_rdc_cfg *rdc = rdc_cfg;
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imx_rdc_console_access_enable(rdc, console_base);
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while (rdc->type != RDC_INVALID) {
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switch (rdc->type) {
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@ -67,7 +67,7 @@ struct imx_rdc_cfg {
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.setting.rdc_mem_region[2] = (mrc), \
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}
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void imx_rdc_init(const struct imx_rdc_cfg *cfg);
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void imx_rdc_init(struct imx_rdc_cfg *cfg, unsigned int console_base);
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#endif /* IMX_RDC_H */
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