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Merge changes from topic "st_fixes" into integration

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* changes:
  fix(stm32mp1): do not reopen debug features
  refactor(stm32mp1): improve DGBMCU driver
  fix(stm32mp1): set reset pulse duration to 31ms
This commit is contained in:
Manish Pandey 2022-01-04 18:46:59 +01:00 • committed by TrustedFirmware Code Review
commit 9b75d94718
3 changed files with 32 additions and 57 deletions
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16
plat/st/stm32mp1/bl2_plat_setup.c
View file

@ -156,7 +156,6 @@ void bl2_platform_setup(void)
void bl2_el3_plat_arch_setup(void)
{
int32_t result;
const char *board_model;
boot_api_context_t *boot_context =
(boot_api_context_t *)stm32mp_get_boot_ctx_address();
@ -224,6 +223,16 @@ void bl2_el3_plat_arch_setup(void)
/* Disable MCKPROT */
mmio_clrbits_32(rcc_base + RCC_TZCR, RCC_TZCR_MCKPROT);
/*
* Set minimum reset pulse duration to 31ms for discrete power
* supplied boards.
*/
if (dt_pmic_status() <= 0) {
mmio_clrsetbits_32(rcc_base + RCC_RDLSICR,
RCC_RDLSICR_MRD_MASK,
31U << RCC_RDLSICR_MRD_SHIFT);
}
generic_delay_timer_init();
#if STM32MP_UART_PROGRAMMER
@ -289,11 +298,6 @@ skip_console_init:
stm32_iwdg_refresh();
result = stm32mp1_dbgmcu_freeze_iwdg2();
if (result != 0) {
INFO("IWDG2 freeze error : %i\n", result);
}
stm32mp1_auth_ops.check_key = boot_context->bootrom_ecdsa_check_key;
stm32mp1_auth_ops.verify_signature =
boot_context->bootrom_ecdsa_verify_signature;

9
plat/st/stm32mp1/include/stm32mp1_dbgmcu.h
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2019, STMicroelectronics - All Rights Reserved
* Copyright (c) 2015-2021, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -13,11 +13,4 @@
int stm32mp1_dbgmcu_get_chip_version(uint32_t *chip_version);
int stm32mp1_dbgmcu_get_chip_dev_id(uint32_t *chip_dev_id);
/*
* Freeze watchdog when a debugger is attached, if the security configuration
* allows it.
* Return 0 on success, a negative error value otherwise.
*/
int stm32mp1_dbgmcu_freeze_iwdg2(void);
#endif /* STM32MP1_DBGMCU_H */

64
plat/st/stm32mp1/stm32mp1_dbgmcu.c
View file

@ -1,9 +1,10 @@
/*
* Copyright (c) 2016-2019, STMicroelectronics - All Rights Reserved
* Copyright (c) 2016-2021, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <assert.h>
#include <errno.h>
#include <platform_def.h>
@ -17,44 +18,32 @@
#include <stm32mp1_dbgmcu.h>
#define DBGMCU_IDC U(0x00)
#define DBGMCU_APB4FZ1 U(0x2C)
#define DBGMCU_IDC_DEV_ID_MASK GENMASK(11, 0)
#define DBGMCU_IDC_REV_ID_MASK GENMASK(31, 16)
#define DBGMCU_IDC_REV_ID_SHIFT 16
#define DBGMCU_APB4FZ1_IWDG2 BIT(2)
static uintptr_t get_rcc_base(void)
{
/* This is called before stm32mp_rcc_base() is available */
return RCC_BASE;
}
static int stm32mp1_dbgmcu_init(void)
{
uint32_t dbg_conf;
uintptr_t rcc_base = get_rcc_base();
dbg_conf = bsec_read_debug_conf();
if ((dbg_conf & BSEC_DBGSWGEN) == 0U) {
uint32_t result = bsec_write_debug_conf(dbg_conf |
BSEC_DBGSWGEN);
if (result != BSEC_OK) {
ERROR("Error enabling DBGSWGEN\n");
return -1;
}
if ((bsec_read_debug_conf() & BSEC_DBGSWGEN) == 0U) {
INFO("Software access to all debug components is disabled\n");
return -1;
}
mmio_setbits_32(rcc_base + RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN);
mmio_setbits_32(RCC_BASE + RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN);
return 0;
}
/*
* @brief Get silicon revision from DBGMCU registers.
* @param chip_version: pointer to the read value.
* @retval 0 on success, negative value on failure.
*/
int stm32mp1_dbgmcu_get_chip_version(uint32_t *chip_version)
{
assert(chip_version != NULL);
if (stm32mp1_dbgmcu_init() != 0) {
return -EPERM;
}
@ -65,32 +54,21 @@ int stm32mp1_dbgmcu_get_chip_version(uint32_t *chip_version)
return 0;
}
/*
* @brief Get device ID from DBGMCU registers.
* @param chip_dev_id: pointer to the read value.
* @retval 0 on success, negative value on failure.
*/
int stm32mp1_dbgmcu_get_chip_dev_id(uint32_t *chip_dev_id)
{
assert(chip_dev_id != NULL);
if (stm32mp1_dbgmcu_init() != 0) {
return -EPERM;
}
*chip_dev_id = mmio_read_32(DBGMCU_BASE + DBGMCU_IDC) &
DBGMCU_IDC_DEV_ID_MASK;
return 0;
}
int stm32mp1_dbgmcu_freeze_iwdg2(void)
{
uint32_t dbg_conf;
if (stm32mp1_dbgmcu_init() != 0) {
return -EPERM;
}
dbg_conf = bsec_read_debug_conf();
if ((dbg_conf & (BSEC_SPIDEN | BSEC_SPINDEN)) != 0U) {
mmio_setbits_32(DBGMCU_BASE + DBGMCU_APB4FZ1,
DBGMCU_APB4FZ1_IWDG2);
}
DBGMCU_IDC_DEV_ID_MASK;
return 0;
}