Merge "fix(cm): change back owning security state when a feature is disabled" into integration

This commit is contained in:
Olivier Deprez 2025-01-14 11:24:31 +01:00 committed by TrustedFirmware Code Review
commit 9ac82c4979
2 changed files with 6 additions and 12 deletions

View file

@ -42,19 +42,14 @@ void spe_disable(cpu_context_t *ctx)
u_register_t mdcr_el3_val = read_ctx_reg(state, CTX_MDCR_EL3);
/*
* MDCR_EL3.NSPB: set to 0x2. After, Non-Secure state owns
* the Profiling Buffer and accesses to Statistical Profiling and Profiling
* Buffer control registers at EL2 and EL1 generate Trap exceptions to EL3.
* Profiling is disabled in Secure and Realm states.
*
* MDCR_EL3.NSPBE: Don't care as it was cleared during spe_enable and setting
* this to 1 does not make sense as NSPBE{1} and NSPB{0b0x} is RESERVED.
* MDCR_EL3.{NSPB,NSPBE} = 0b00, 0b0
* Disable access of profiling buffer control registers from lower ELs
* in any security state. Secure state owns the buffer.
*
* MDCR_EL3.EnPMSN (ARM v8.7): Clear the bit to trap access of PMSNEVFR_EL1
* from EL2/EL1 to EL3.
*/
mdcr_el3_val &= ~(MDCR_NSPB(MDCR_NSPB_EL1) | MDCR_EnPMSN_BIT);
mdcr_el3_val |= MDCR_NSPB(MDCR_NSPB_EL3);
mdcr_el3_val &= ~(MDCR_NSPB(MDCR_NSPB_EL1) | MDCR_NSPBE_BIT | MDCR_EnPMSN_BIT);
write_ctx_reg(state, CTX_MDCR_EL3, mdcr_el3_val);
}

View file

@ -35,13 +35,12 @@ void trbe_disable(cpu_context_t *ctx)
u_register_t mdcr_el3_val = read_ctx_reg(state, CTX_MDCR_EL3);
/*
* MDCR_EL3.{NSTBE,NSTB} = 0b0, 0b10
* MDCR_EL3.{NSTBE,NSTB} = 0b0, 0b00
* Disable access of trace buffer control registers from lower ELs in
* any security state. Non-secure owns the buffer.
* any security state. Secure state owns the buffer.
*/
mdcr_el3_val &= ~(MDCR_NSTB(MDCR_NSTB_EL1));
mdcr_el3_val &= ~(MDCR_NSTBE_BIT);
mdcr_el3_val |= MDCR_NSTB(MDCR_NSTB_EL3);
write_ctx_reg(state, CTX_MDCR_EL3, mdcr_el3_val);
}