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Merge "fix(cpus): workaround for Cortex X3 erratum 2743088" into integration
This commit is contained in:
commit
9ac42bf263
4 changed files with 20 additions and 3 deletions
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@ -783,6 +783,10 @@ For Cortex-X3, the following errata build flags are defined :
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Cortex-X3 CPU. This needs to be enabled only for revisions r0p0, r1p0 and
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Cortex-X3 CPU. This needs to be enabled only for revisions r0p0, r1p0 and
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r1p1. It is fixed in r1p2.
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r1p1. It is fixed in r1p2.
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- ``ERRATA_X3_2743088``: This applies errata 2743088 workaround to Cortex-X3
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CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1. It is
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fixed in r1p2.
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- ``ERRATA_X3_2779509``: This applies errata 2779509 workaround to Cortex-X3
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- ``ERRATA_X3_2779509``: This applies errata 2779509 workaround to Cortex-X3
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CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the
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CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the
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CPU. It is fixed in r1p2.
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CPU. It is fixed in r1p2.
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@ -57,6 +57,13 @@ workaround_reset_end cortex_x3, ERRATUM(2742421)
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check_erratum_ls cortex_x3, ERRATUM(2742421), CPU_REV(1, 1)
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check_erratum_ls cortex_x3, ERRATUM(2742421), CPU_REV(1, 1)
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workaround_runtime_start cortex_x3, ERRATUM(2743088), ERRATA_X3_2743088
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/* dsb before isb of power down sequence */
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dsb sy
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workaround_runtime_end cortex_x3, ERRATUM(2743088), NO_ISB
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check_erratum_ls cortex_x3, ERRATUM(2743088), CPU_REV(1, 1)
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workaround_reset_start cortex_x3, ERRATUM(2779509), ERRATA_X3_2779509
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workaround_reset_start cortex_x3, ERRATUM(2779509), ERRATA_X3_2779509
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/* Set CPUACTLR3_EL1 bit 47 */
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/* Set CPUACTLR3_EL1 bit 47 */
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sysreg_bit_set CORTEX_X3_CPUACTLR3_EL1, CORTEX_X3_CPUACTLR3_EL1_BIT_47
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sysreg_bit_set CORTEX_X3_CPUACTLR3_EL1, CORTEX_X3_CPUACTLR3_EL1_BIT_47
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@ -82,12 +89,13 @@ cpu_reset_func_end cortex_x3
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* ----------------------------------------------------
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* ----------------------------------------------------
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*/
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*/
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func cortex_x3_core_pwr_dwn
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func cortex_x3_core_pwr_dwn
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apply_erratum cortex_x3, ERRATUM(2313909), ERRATA_X3_2313909
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apply_erratum cortex_x3, ERRATUM(2313909), ERRATA_X3_2313909
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/* ---------------------------------------------------
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/* ---------------------------------------------------
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* Enable CPU power down bit in power control register
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* Enable CPU power down bit in power control register
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* ---------------------------------------------------
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* ---------------------------------------------------
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*/
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*/
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sysreg_bit_set CORTEX_X3_CPUPWRCTLR_EL1, CORTEX_X3_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
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sysreg_bit_set CORTEX_X3_CPUPWRCTLR_EL1, CORTEX_X3_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
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apply_erratum cortex_x3, ERRATUM(2743088), ERRATA_X3_2743088
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isb
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isb
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ret
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ret
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endfunc cortex_x3_core_pwr_dwn
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endfunc cortex_x3_core_pwr_dwn
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@ -786,6 +786,10 @@ CPU_FLAG_LIST += ERRATA_X3_2615812
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# to revisions r0p0, r1p0 and r1p1 of the Cortex-X3 cpu, it is fixed in r1p2.
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# to revisions r0p0, r1p0 and r1p1 of the Cortex-X3 cpu, it is fixed in r1p2.
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CPU_FLAG_LIST += ERRATA_X3_2742421
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CPU_FLAG_LIST += ERRATA_X3_2742421
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# Flag to apply erratum 2743088 workaround on powerdown. This erratum applies
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# to revisions r0p0, r1p0 and r1p1 of the Cortex-X3 cpu, it is fixed in r1p2.
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CPU_FLAG_LIST += ERRATA_X3_2743088
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# Flag to apply erratum 2779509 workaround on reset. This erratum applies
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# Flag to apply erratum 2779509 workaround on reset. This erratum applies
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# to revisions r0p0, r1p0, r1p1 of the Cortex-X3 cpu, it is fixed in r1p2.
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# to revisions r0p0, r1p0, r1p1 of the Cortex-X3 cpu, it is fixed in r1p2.
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CPU_FLAG_LIST += ERRATA_X3_2779509
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CPU_FLAG_LIST += ERRATA_X3_2779509
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@ -449,8 +449,9 @@ struct em_cpu_list cpu_list[] = {
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[1] = {2313909, 0x00, 0x10, ERRATA_X3_2313909},
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[1] = {2313909, 0x00, 0x10, ERRATA_X3_2313909},
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[2] = {2615812, 0x00, 0x11, ERRATA_X3_2615812},
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[2] = {2615812, 0x00, 0x11, ERRATA_X3_2615812},
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[3] = {2742421, 0x00, 0x11, ERRATA_X3_2742421},
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[3] = {2742421, 0x00, 0x11, ERRATA_X3_2742421},
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[4] = {2779509, 0x00, 0x11, ERRATA_X3_2779509},
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[4] = {2743088, 0x00, 0x11, ERRATA_X3_2743088},
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[5 ... ERRATA_LIST_END] = UNDEF_ERRATA,
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[5] = {2779509, 0x00, 0x11, ERRATA_X3_2779509},
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[6 ... ERRATA_LIST_END] = UNDEF_ERRATA,
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}
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}
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},
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},
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#endif /* CORTEX_X3_H_INC */
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#endif /* CORTEX_X3_H_INC */
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