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fix(stm32mp1): set reset pulse duration to 31ms

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According to ST Application note AN5256 [1], the minimum reset pulse
duration should be set to 31ms on boards powered with discrete
regulators.

[1] https://www.st.com/resource/en/application_note/dm00561921.pdf

Change-Id: Ib6ed029ee8a4b95f75a80948fdd2154b4ebe484f
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
This commit is contained in:
Yann Gautier 2021-04-27 18:19:13 +02:00 • committed by Yann Gautier
parent c8076a0e69
commit 9a73a56c35
1 changed files with 10 additions and 0 deletions
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10
plat/st/stm32mp1/bl2_plat_setup.c
View file

@ -227,6 +227,16 @@ void bl2_el3_plat_arch_setup(void)
/* Disable MCKPROT */
mmio_clrbits_32(rcc_base + RCC_TZCR, RCC_TZCR_MCKPROT);
/*
* Set minimum reset pulse duration to 31ms for discrete power
* supplied boards.
*/
if (dt_pmic_status() <= 0) {
mmio_clrsetbits_32(rcc_base + RCC_RDLSICR,
RCC_RDLSICR_MRD_MASK,
31U << RCC_RDLSICR_MRD_SHIFT);
}
generic_delay_timer_init();
#if STM32MP_UART_PROGRAMMER