From 998da640fa295c5776773d3762d06da28977e4bd Mon Sep 17 00:00:00 2001 From: Harrison Mutai Date: Wed, 20 Mar 2024 11:38:07 +0000 Subject: [PATCH] refactor: fix common misspelling of init* Change-Id: I3fc95e8e53ef487fd5a559cda739aaea33d765a9 Signed-off-by: Harrison Mutai --- drivers/arm/gic/v3/gic600_multichip.c | 4 ++-- plat/common/aarch64/crash_console_helpers.S | 4 ++-- plat/intel/soc/agilex5/bl31_plat_setup.c | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/arm/gic/v3/gic600_multichip.c b/drivers/arm/gic/v3/gic600_multichip.c index a4786bb8c..5e44aa95c 100644 --- a/drivers/arm/gic/v3/gic600_multichip.c +++ b/drivers/arm/gic/v3/gic600_multichip.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2023, Arm Limited. All rights reserved. + * Copyright (c) 2019-2024, Arm Limited. All rights reserved. * Copyright (c) 2022-2023, NVIDIA Corporation. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause @@ -75,7 +75,7 @@ static void set_gicd_dchipr_rt_owner(uintptr_t base, unsigned int rt_owner) panic(); } - /* Poll till PUP is zero before intiating write */ + /* Poll till PUP is zero before initiating write */ gicd_dchipr_wait_for_power_update_progress(base); write_gicd_dchipr(base, read_gicd_dchipr(base) | diff --git a/plat/common/aarch64/crash_console_helpers.S b/plat/common/aarch64/crash_console_helpers.S index 75b420893..1a5009199 100644 --- a/plat/common/aarch64/crash_console_helpers.S +++ b/plat/common/aarch64/crash_console_helpers.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2018-2024, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -100,7 +100,7 @@ endfunc plat_crash_console_init * int plat_crash_console_putc(char c) * Prints the character on all consoles registered with the console * framework that have CONSOLE_FLAG_CRASH set. Note that this is only - * helpful for crashes that occur after the platform intialization code + * helpful for crashes that occur after the platform initialization code * has registered a console. Platforms using this implementation need to * ensure that all console drivers they use that have the CRASH flag set * support this (i.e. are written in assembly and comply to the register diff --git a/plat/intel/soc/agilex5/bl31_plat_setup.c b/plat/intel/soc/agilex5/bl31_plat_setup.c index 0d4f2cc52..8d3928fd0 100644 --- a/plat/intel/soc/agilex5/bl31_plat_setup.c +++ b/plat/intel/soc/agilex5/bl31_plat_setup.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2019-2024, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2019-2023, Intel Corporation. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause @@ -182,7 +182,7 @@ const mmap_region_t plat_agilex_mmap[] = { /******************************************************************************* * Perform the very early platform specific architectural setup here. At the - * moment this is only intializes the mmu in a quick and dirty way. + * moment this is only initializes the mmu in a quick and dirty way. ******************************************************************************/ void bl31_plat_arch_setup(void) {