diff --git a/include/plat/common/plat_drtm.h b/include/plat/common/plat_drtm.h index e96e71958..07545a68f 100644 --- a/include/plat/common/plat_drtm.h +++ b/include/plat/common/plat_drtm.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, Arm Limited. All rights reserved. + * Copyright (c) 2022-2024, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -17,7 +17,7 @@ typedef struct { typedef struct { bool tpm_based_hash_support; - uint32_t firmware_hash_algorithm; + uint16_t firmware_hash_algorithm; } plat_drtm_tpm_features_t; typedef struct { @@ -26,7 +26,7 @@ typedef struct { } __attribute__((packed)) drtm_mem_region_t; /* - * Memory region descriptor table structure as per DRTM beta0 section 3.13 + * Memory region descriptor table structure as per DRTM 1.0 section 3.13 * Table 11 MEMORY_REGION_DESCRIPTOR_TABLE */ typedef struct { diff --git a/include/services/drtm_svc.h b/include/services/drtm_svc.h index 69b314f08..f0d3c63bc 100644 --- a/include/services/drtm_svc.h +++ b/include/services/drtm_svc.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022 Arm Limited. All rights reserved. + * Copyright (c) 2022-2024 Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause * @@ -54,10 +54,10 @@ (((_fid) >= ARM_DRTM_SVC_VERSION) && ((_fid) <= ARM_DRTM_SVC_LOCK_TCB_HASH)) /* ARM DRTM Service Calls version numbers */ -#define ARM_DRTM_VERSION_MAJOR U(0) +#define ARM_DRTM_VERSION_MAJOR U(1) #define ARM_DRTM_VERSION_MAJOR_SHIFT 16 #define ARM_DRTM_VERSION_MAJOR_MASK U(0x7FFF) -#define ARM_DRTM_VERSION_MINOR U(1) +#define ARM_DRTM_VERSION_MINOR U(0) #define ARM_DRTM_VERSION_MINOR_SHIFT 0 #define ARM_DRTM_VERSION_MINOR_MASK U(0xFFFF) @@ -74,7 +74,7 @@ #define ARM_DRTM_FEAT_ID_MASK ULL(0xff) /* - * Definitions for DRTM features as per DRTM beta0 section 3.3, + * Definitions for DRTM features as per DRTM 1.0 section 3.3, * Table 6 DRTM_FEATURES */ #define ARM_DRTM_TPM_FEATURES_PCR_SCHEMA_SHIFT U(33) @@ -87,7 +87,7 @@ #define ARM_DRTM_TPM_FEATURES_TPM_HASH_SUPPORTED ULL(0x1) #define ARM_DRTM_TPM_FEATURES_FW_HASH_SHIFT U(0) -#define ARM_DRTM_TPM_FEATURES_FW_HASH_MASK ULL(0xFFFFFFFF) +#define ARM_DRTM_TPM_FEATURES_FW_HASH_MASK ULL(0xFFFF) #define ARM_DRTM_TPM_FEATURES_FW_HASH_SHA256 ULL(0xB) #define ARM_DRTM_TPM_FEATURES_FW_HASH_SHA384 ULL(0xC) #define ARM_DRTM_TPM_FEATURES_FW_HASH_SHA512 ULL(0xD) diff --git a/services/std_svc/drtm/drtm_main.c b/services/std_svc/drtm/drtm_main.c index 3acf6838e..b9c83fa08 100644 --- a/services/std_svc/drtm/drtm_main.c +++ b/services/std_svc/drtm/drtm_main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022 Arm Limited. All rights reserved. + * Copyright (c) 2022-2024 Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause * @@ -211,7 +211,7 @@ static enum drtm_retc drtm_dl_check_cores(void) running_on_single_core = psci_is_last_on_cpu_safe(); if (!running_on_single_core) { ERROR("DRTM: invalid launch due to non-boot PE not being turned off\n"); - return DENIED; + return SECONDARY_PE_NOT_OFF; } return SUCCESS; @@ -658,7 +658,7 @@ static uint64_t drtm_dynamic_launch(uint64_t x1, void *handle) drtm_dl_prepare_eret_to_dlme(&args, dlme_el); /* - * As per DRTM beta0 spec table #28 invalidate the instruction cache + * As per DRTM 1.0 spec table #30 invalidate the instruction cache * before jumping to the DLME. This is required to defend against * potentially-malicious cache contents. */ diff --git a/services/std_svc/drtm/drtm_main.h b/services/std_svc/drtm/drtm_main.h index 60051632e..a7d053f17 100644 --- a/services/std_svc/drtm/drtm_main.h +++ b/services/std_svc/drtm/drtm_main.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022 Arm Limited. All rights reserved. + * Copyright (c) 2022-2024 Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause * @@ -55,6 +55,12 @@ enum drtm_retc { NOT_FOUND = -4, INTERNAL_ERROR = -5, MEM_PROTECT_INVALID = -6, + COPROCESSOR_ERROR = -7, + OUT_OF_RESOURCE = -8, + INVALID_DATA = -9, + SECONDARY_PE_NOT_OFF = -10, + ALREADY_CLOSED = -11, + TPM_ERROR = -12 }; typedef struct { @@ -89,6 +95,7 @@ struct __packed dlme_data_header_v1 { uint64_t dlme_addr_map_size; uint64_t dlme_tpm_log_size; uint64_t dlme_tcb_hashes_table_size; + uint64_t dlme_acpi_tables_region_size; uint64_t dlme_impdef_region_size; } __aligned(__alignof(uint16_t /* First member's type, `uint16_t version'. */));