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fix(neoverse-rd): initialize CNTFRQ_EL0 for RESET_TO_BL31

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When RESET_TO_BL31 was enabled, CNTFRQ_EL0 was left uninitialized,
leading to incorrect system counter frequency settings. This
impacted timer-dependent components, such as SMMUv3, causing
initialization failures and unpredictable behavior.

To fix this, CNTFRQ_EL0 is now explicitly set using
plat_get_syscnt_freq2(), ensuring the correct system timer
frequency and proper initialization of dependent components.

Signed-off-by: Lokesh B V <Lokesh.BV@Arm.com>
Change-Id: I808b17d25c87c4dce1bc2c8171a800b69b5c2908
This commit is contained in:
Lokesh B V 2025-02-11 18:46:20 +05:30
parent 0f38b9f87e
commit 94a4383a2b
1 changed files with 7 additions and 0 deletions
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7
plat/arm/board/neoverse_rd/common/nrd_bl31_setup.c
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@ -154,6 +154,13 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
nrd_plat_info.config_id = plat_arm_nrd_get_config_id();
nrd_plat_info.multi_chip_mode = plat_arm_nrd_get_multi_chip_mode();
#if RESET_TO_BL31
#if (ARM_ARCH_MAJOR > 7) || defined(ARMV7_SUPPORTS_GENERIC_TIMER)
/* Set the counter frequency for the generic timer */
write_cntfrq_el0(plat_get_syscnt_freq2());
#endif
#endif /* RESET_TO_BL31 */
/* Initialize generic timer */
generic_delay_timer_init();