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docs: update feature support overview
The feature support overview is meant to list all the major features present in TF-A. It should be precise, non-exhaustive and up-to-date. Updated the document with new features and removed few unnecessary details. Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: I28b378f405a6b9d8f86e7b44e435c33625e3d260
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@ -22,8 +22,8 @@ Current features
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Cache Coherent Network (CCN), Network Interconnect (NIC) and TrustZone
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Controller (TZC).
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- A generic |SCMI| driver to interface with conforming power controllers, for
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example the Arm System Control Processor (SCP).
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- Secure Monitor library code such as world switching, EL2/EL1 context
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management and interrupt routing.
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- SMC (Secure Monitor Call) handling, conforming to the `SMC Calling
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Convention`_ using an EL3 runtime services framework.
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@ -34,14 +34,22 @@ Current features
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is also suitable for integration with other AArch32 EL3 Runtime Software,
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for example an AArch32 Secure OS.
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- A generic |SCMI| driver to interface with conforming power controllers, for
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example the Arm System Control Processor (SCP).
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- A minimal AArch32 Secure Payload (*SP_MIN*) to demonstrate |PSCI| library
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integration with AArch32 EL3 Runtime Software.
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- Secure Monitor library code such as world switching, EL1 context management
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and interrupt routing.
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When a Secure-EL1 Payload (SP) is present, for example a Secure OS, the
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AArch64 EL3 Runtime Software must be integrated with a Secure Payload
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Dispatcher (SPD) component to customize the interaction with the SP.
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- Secure partition manager dispatcher(SPMD) with following two configurations:
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- S-EL2 SPMC implementation, widely compliant with FF-A v1.1 EAC0 and initial
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support of FF-A v1.2.
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- EL3 SPMC implementation, compliant with a subset of FF-A v1.1 EAC0.
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- Support for Arm CCA based on FEAT_RME which supports authenticated boot and
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execution of RMM with the necessary routing of RMI commands as specified in
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RMM Beta 0 Specification.
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- A Test SP and SPD to demonstrate AArch64 Secure Monitor functionality and SP
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interaction with PSCI.
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@ -50,12 +58,20 @@ Current features
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`Trusty Secure OS`_ and `ProvenCore Secure OS`_.
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- A Trusted Board Boot implementation, conforming to all mandatory TBBR
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requirements. This includes image authentication, Firmware Update (or
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recovery mode), and packaging of the various firmware images into a
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requirements. This includes image authentication, Firmware recovery,
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Firmware encryption and packaging of the various firmware images into a
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Firmware Image Package (FIP).
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- Pre-integration of TBB with the Arm CryptoCell product, to take advantage of
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its hardware Root of Trust and crypto acceleration services.
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- Measured boot support with PoC to showcase its interaction with firmware TPM
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(fTPM) service implemneted on top of OP-TEE.
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- Support for Dynamic Root of Trust for Measurement (DRTM).
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- Following firmware update mechanisms available:
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- PSA Firmware Update (PSA FWU)
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- TBBR Firmware Update (TBBR FWU)
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- Reliability, Availability, and Serviceability (RAS) functionality, including
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@ -81,6 +97,8 @@ Current features
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secure system processor, or where a non-TF-A ROM expects BL2 to be loaded
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at EL3.
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- Support for Errata management firmware interface.
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- Support for the GCC, LLVM and Arm Compiler 6 toolchains.
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- Support for combining several libraries into a "romlib" image that may be
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@ -88,27 +106,13 @@ Current features
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in ROM but is accessed through a jump-table that may be stored
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in read-write memory, allowing for the library code to be patched.
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- Support for the Secure Partition Manager Dispatcher (SPMD) component as a
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new standard service.
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- Support for ARMv8.3 pointer authentication in the normal and secure worlds.
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The use of pointer authentication in the normal world is enabled whenever
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architectural support is available, without the need for additional build
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flags.
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- Position-Independent Executable (PIE) support. Currently for BL2, BL31, and
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TSP, with further support to be added in a future release.
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- Position-Independent Executable (PIE) support.
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Still to come
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-------------
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- Support for additional platforms.
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- Refinements to Position Independent Executable (PIE) support.
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- Continued support for the FF-A v1.0 (formally known as SPCI) specification, to enable the
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use of secure partition management in the secure world.
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- Documentation enhancements.
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- Ongoing support for new architectural features, CPUs and System IP.
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@ -125,4 +129,4 @@ Still to come
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--------------
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*Copyright (c) 2019-2021, Arm Limited. All rights reserved.*
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*Copyright (c) 2019-2023, Arm Limited. All rights reserved.*
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