Merge "fix(errata): workaround for Cortex-A510 erratum 2347730" into integration

docs/design/cpu-specific-build-macros.rst

@@ -597,6 +597,10 @@ For Cortex-A510, the following errata build flags are defined :
    Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2,
    r0p3 and r1p0, it is fixed in r1p1.
 
+- ``ERRATA_A510_2347730``: This applies errata 2347730 workaround to
+   Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2,
+   r0p3, r1p0 and r1p1. It is fixed in r1p2.
+
 -  ``ERRATA_A510_2371937``: This applies errata 2371937 workaround to
    Cortex-A510 CPU. This needs to applied for revisions r0p0, r0p1, r0p2,
    r0p3, r1p0, r1p1, and is fixed in r1p2.

include/lib/cpus/aarch64/cortex_a510.h

@@ -35,5 +35,6 @@
  * Auxiliary control register specific definitions
  ******************************************************************************/
 #define CORTEX_A510_CPUACTLR_EL1				S3_0_C15_C1_0
+#define CORTEX_A510_CPUACTLR_EL1_BIT_17				(ULL(1) << 17)
 
 #endif /* CORTEX_A510_H */

lib/cpus/aarch64/cortex_a510.S

@@ -264,6 +264,38 @@ func check_errata_2172148
 	b	cpu_rev_var_ls
 endfunc check_errata_2172148
 
+	/* ----------------------------------------------------
+	 * Errata Workaround for Cortex-A510 Errata #2347730.
+	 * This applies to revisions r0p0 - r0p3, r1p0, r1p1.
+	 * It is fixed in r1p2.
+	 * Inputs:
+	 * x0: variant[4:7] and revision[0:3] of current cpu.
+	 * Shall clobber: x0-x1, x17
+	 * ----------------------------------------------------
+	 */
+func errata_cortex_a510_2347730_wa
+	mov	x17, x30
+	bl	check_errata_2347730
+	cbz	x0, 1f
+
+	/*
+	 * Set CPUACTLR_EL1[17] to 1'b1, which disables
+	 * specific microarchitectural clock gating
+	 * behaviour.
+	 */
+	mrs	x1, CORTEX_A510_CPUACTLR_EL1
+	orr	x1, x1, CORTEX_A510_CPUACTLR_EL1_BIT_17
+	msr	CORTEX_A510_CPUACTLR_EL1, x1
+1:
+	ret x17
+endfunc errata_cortex_a510_2347730_wa
+
+func check_errata_2347730
+	/* Applies to revisions r1p1 and lower. */
+	mov	x1, #0x11
+	b	cpu_rev_var_ls
+endfunc check_errata_2347730
+
 	/*---------------------------------------------------
 	 * Errata Workaround for Cortex-A510 Errata #2371937.
 	 * This applies to revisions r1p1 and lower, and is
@@ -335,6 +367,7 @@ func cortex_a510_errata_report
 	report_errata ERRATA_A510_2250311, cortex_a510, 2250311
 	report_errata ERRATA_A510_2218950, cortex_a510, 2218950
 	report_errata ERRATA_A510_2172148, cortex_a510, 2172148
+	report_errata ERRATA_A510_2347730, cortex_a510, 2347730
 	report_errata ERRATA_A510_2371937, cortex_a510, 2371937
 	report_errata ERRATA_DSU_2313941, cortex_a510, dsu_2313941
 
@@ -397,6 +430,11 @@ func cortex_a510_reset_func
 	bl	errata_cortex_a510_2172148_wa
 #endif
 
+#if ERRATA_A510_2347730
+	mov	x0, x18
+	bl	errata_cortex_a510_2347730_wa
+#endif
+
 	isb
 	ret	x19
 endfunc cortex_a510_reset_func

lib/cpus/cpu-ops.mk

@@ -653,6 +653,11 @@ ERRATA_A510_2218950	?=0
 # to revisions r0p0, r0p1, r0p2, r0p3 and r1p0, and is fixed in r1p1.
 ERRATA_A510_2172148	?=0
 
+# Flag to apply erratum 2347730 workaround during reset. This erratum applies
+# to revisions r0p0, r0p1, r0p2, r0p3, r1p0 and r1p1 of the Cortex-A510 CPU,
+# and is fixed in r1p2.
+ERRATA_A510_2347730	?=0
+
 # Flag to apply erratum 2371937 workaround during reset. This erratum applies
 # to revisions r0p0, r0p1, r0p2, r0p3, r1p0, and r1p1. It is fixed in r1p2.
 ERRATA_A510_2371937	?=0
@@ -1235,6 +1240,10 @@ $(eval $(call add_define,ERRATA_A510_2218950))
 $(eval $(call assert_boolean,ERRATA_A510_2172148))
 $(eval $(call add_define,ERRATA_A510_2172148))
 
+# Process ERRATA_A510_2347730 flag
+$(eval $(call assert_boolean,ERRATA_A510_2347730))
+$(eval $(call add_define,ERRATA_A510_2347730))
+
 # Process ERRATA_A510_2371937 flag
 $(eval $(call assert_boolean,ERRATA_A510_2371937))
 $(eval $(call add_define,ERRATA_A510_2371937))