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errata: workaround for Neoverse-N2 errata 2002655
Neoverse-N2 erratum 2002655 is a Cat B erratum present in r0p0 of the Neoverse-N2 processor core, and it is still open. Neoverse-N2 SDEN: https://documentation-service.arm.com/static/61098b4e3d73a34b640e32c9?token= Signed-off-by: nayanpatel-arm <nayankumar.patel@arm.com> Change-Id: I1380418146807527abd97cdd4918265949ba5c01
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3 changed files with 78 additions and 2 deletions
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@ -333,6 +333,11 @@ For Neoverse N1, the following errata build flags are defined :
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CPU. This needs to be enabled for revisions r3p0, r3p1, r4p0, and r4p1, for
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revisions r0p0, r1p0, and r2p0 there is no workaround.
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For Neoverse N2, the following errata build flags are defined :
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- ``ERRATA_N2_2002655``: This applies errata 2002655 workaround to Neoverse-N2
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CPU. This needs to be enabled for revision r0p0 of the CPU, it is still open.
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For Neoverse V1, the following errata build flags are defined :
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- ``ERRATA_V1_1774420``: This applies errata 1774420 workaround to Neoverse-V1
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@ -19,11 +19,55 @@
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#error "Neoverse-N2 supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0"
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#endif
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/* --------------------------------------------------
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* Errata Workaround for Neoverse N2 Erratum 2002655.
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* This applies to revision r0p0 of Neoverse N2. it is still open.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x17
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* --------------------------------------------------
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*/
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func errata_n2_2002655_wa
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/* Check revision. */
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mov x17, x30
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bl check_errata_2002655
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cbz x0, 1f
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/* Apply instruction patching sequence */
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ldr x0,=0x6
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msr S3_6_c15_c8_0,x0
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ldr x0,=0xF3A08002
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msr S3_6_c15_c8_2,x0
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ldr x0,=0xFFF0F7FE
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msr S3_6_c15_c8_3,x0
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ldr x0,=0x40000001003ff
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msr S3_6_c15_c8_1,x0
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ldr x0,=0x7
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msr S3_6_c15_c8_0,x0
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ldr x0,=0xBF200000
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msr S3_6_c15_c8_2,x0
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ldr x0,=0xFFEF0000
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msr S3_6_c15_c8_3,x0
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ldr x0,=0x40000001003f3
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msr S3_6_c15_c8_1,x0
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isb
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1:
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ret x17
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endfunc errata_n2_2002655_wa
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func check_errata_2002655
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/* Applies to r0p0 */
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mov x1, #0x00
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b cpu_rev_var_ls
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endfunc check_errata_2002655
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/* -------------------------------------------------
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* The CPU Ops reset function for Neoverse N2.
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* -------------------------------------------------
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*/
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func neoverse_n2_reset_func
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mov x19, x30
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/* Check if the PE implements SSBS */
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mrs x0, id_aa64pfr1_el1
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tst x0, #(ID_AA64PFR1_EL1_SSBS_MASK << ID_AA64PFR1_EL1_SSBS_SHIFT)
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@ -58,8 +102,16 @@ func neoverse_n2_reset_func
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msr NEOVERSE_N2_CPUECTLR_EL1, x0
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#endif
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bl cpu_get_rev_var
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mov x18, x0
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#if ERRATA_N2_2002655
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mov x0, x18
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bl errata_n2_2002655_wa
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#endif
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isb
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ret
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ret x19
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endfunc neoverse_n2_reset_func
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func neoverse_n2_core_pwr_dwn
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@ -80,7 +132,18 @@ endfunc neoverse_n2_core_pwr_dwn
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* Errata printing function for Neoverse N2 cores. Must follow AAPCS.
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*/
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func neoverse_n2_errata_report
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/* No errata reported for Neoverse N2 cores */
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stp x8, x30, [sp, #-16]!
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bl cpu_get_rev_var
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mov x8, x0
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/*
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* Report all errata. The revision-variant information is passed to
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* checking functions of each errata.
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*/
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report_errata ERRATA_N2_2002655, neoverse_n2, 2002655
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ldp x8, x30, [sp], #16
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ret
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endfunc neoverse_n2_errata_report
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#endif
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@ -380,6 +380,10 @@ ERRATA_N1_1868343 ?=0
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# exists in revisions r0p0, r1p0, and r2p0 as well but there is no workaround.
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ERRATA_N1_1946160 ?=0
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# Flag to apply erratum 2002655 workaround during reset. This erratum applies
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# to revisions r0p0 of the Neoverse-N2 cpu, it is still open.
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ERRATA_N2_2002655 ?=0
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# Flag to apply erratum 1774420 workaround during reset. This erratum applies
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# to revisions r0p0 and r1p0 of the Neoverse V1 core, and was fixed in r1p1.
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ERRATA_V1_1774420 ?=0
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@ -722,6 +726,10 @@ $(eval $(call add_define,ERRATA_N1_1868343))
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$(eval $(call assert_boolean,ERRATA_N1_1946160))
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$(eval $(call add_define,ERRATA_N1_1946160))
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# Process ERRATA_N2_2002655 flag
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$(eval $(call assert_boolean,ERRATA_N2_2002655))
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$(eval $(call add_define,ERRATA_N2_2002655))
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# Process ERRATA_V1_1774420 flag
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$(eval $(call assert_boolean,ERRATA_V1_1774420))
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$(eval $(call add_define,ERRATA_V1_1774420))
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