diff --git a/fdts/tc-fpga.dtsi b/fdts/tc-fpga.dtsi index 08b9ae560..c7618088d 100644 --- a/fdts/tc-fpga.dtsi +++ b/fdts/tc-fpga.dtsi @@ -25,6 +25,19 @@ stdout-path = "serial0:38400n8"; }; +#if TC_FPGA_ANDROID_IMG_IN_RAM + reserved-memory { + phram@0x880000000 { + /* + * starting from 0x8_8000_0000 reserve some memory + * android image will be side loaded to this location + */ + reg = <0x8 0x80000000 HI(ANDROID_FS_SIZE) LO(ANDROID_FS_SIZE)> + no-map; + }; + }; +#endif /* TC_FPGA_ANDROID_IMG_IN_RAM */ + ethernet: ethernet@ETHERNET_ADDR { compatible = "smsc,lan9115"; phy-mode = "mii"; diff --git a/plat/arm/board/tc/include/platform_def.h b/plat/arm/board/tc/include/platform_def.h index 92afb62a1..abe602a09 100644 --- a/plat/arm/board/tc/include/platform_def.h +++ b/plat/arm/board/tc/include/platform_def.h @@ -242,10 +242,28 @@ #if TARGET_PLATFORM <= 2 #define PLAT_ARM_DRAM2_BASE ULL(0x8080000000) +#define PLAT_ARM_DRAM2_SIZE ULL(0x180000000) #elif TARGET_PLATFORM >= 3 -#define PLAT_ARM_DRAM2_BASE ULL(0x880000000) -#endif /* TARGET_PLATFORM >= 3 */ -#define PLAT_ARM_DRAM2_SIZE ULL(0x380000000) + +#if TC_FPGA_ANDROID_IMG_IN_RAM +/* 10GB reserved for system+userdata+vendor images */ +#define SYSTEM_IMAGE_SIZE 0xC0000000 /* 3GB */ +#define USERDATA_IMAGE_SIZE 0x140000000 /* 5GB */ +#define VENDOR_IMAGE_SIZE 0x20000000 /* 512MB */ +#define RESERVE_IMAGE_SIZE 0x60000000 /* 1.5GB */ +#define ANDROID_FS_SIZE (SYSTEM_IMAGE_SIZE + \ + USERDATA_IMAGE_SIZE + \ + VENDOR_IMAGE_SIZE + RESERVE_IMAGE_SIZE) + +#define PLAT_ARM_DRAM2_BASE ULL(0x880000000) + ANDROID_FS_SIZE +#define PLAT_ARM_DRAM2_SIZE ULL(0x380000000) - ANDROID_FS_SIZE +#else +#define PLAT_ARM_DRAM2_BASE ULL(0x880000000) +#define PLAT_ARM_DRAM2_SIZE ULL(0x380000000) +#endif /* TC_FPGA_ANDROID_IMG_IN_RAM */ + +#endif /* TARGET_VERSION >= 3 */ + #define PLAT_ARM_DRAM2_END (PLAT_ARM_DRAM2_BASE + PLAT_ARM_DRAM2_SIZE - 1ULL) #define TC_NS_MTE_SIZE (256 * SZ_1M) diff --git a/plat/arm/board/tc/platform.mk b/plat/arm/board/tc/platform.mk index 9cd3011e8..095882809 100644 --- a/plat/arm/board/tc/platform.mk +++ b/plat/arm/board/tc/platform.mk @@ -77,12 +77,16 @@ ifeq ($(filter ${TARGET_FLAVOUR}, fvp fpga),) $(error TARGET_FLAVOUR must be fvp or fpga) endif +# Support for loading Android Image to DRAM +TC_FPGA_ANDROID_IMG_IN_RAM := 0 + $(eval $(call add_defines, \ TARGET_PLATFORM \ TARGET_FLAVOUR_$(call uppercase,${TARGET_FLAVOUR}) \ TC_RESOLUTION_$(call uppercase,${TC_RESOLUTION}) \ TC_DPU_USE_SCMI_CLK \ TC_SCMI_PD_CTRL_EN \ + TC_FPGA_ANDROID_IMG_IN_RAM \ )) CSS_LOAD_SCP_IMAGES := 1