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refactor(cpus): convert the Cortex-A76AE to use cpu helpers

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Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
Change-Id: I72627afd0e2f10fb754d5c0de137fc9714ed391f
This commit is contained in:
Govindraj Raja 2023-06-15 15:34:38 -05:00
parent c62d9c7d27
commit 91ba1a5edf
1 changed files with 2 additions and 9 deletions
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11
lib/cpus/aarch64/cortex_a76ae.S
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@ -33,8 +33,7 @@ workaround_reset_start cortex_a76ae, CVE(2022, 23960), WORKAROUND_CVE_2022_23960
* The Cortex-A76ae generic vectors are overridden to apply errata * The Cortex-A76ae generic vectors are overridden to apply errata
* mitigation on exception entry from lower ELs. * mitigation on exception entry from lower ELs.
*/ */
adr x0, wa_cve_vbar_cortex_a76ae override_vector_table wa_cve_vbar_cortex_a76ae
msr vbar_el3, x0
isb isb
#endif /* IMAGE_BL31 */ #endif /* IMAGE_BL31 */
workaround_reset_end cortex_a76ae, CVE(2022, 23960) workaround_reset_end cortex_a76ae, CVE(2022, 23960)
@ -49,13 +48,7 @@ errata_report_shim cortex_a76ae
* ---------------------------------------------------- * ----------------------------------------------------
*/ */
func cortex_a76ae_core_pwr_dwn func cortex_a76ae_core_pwr_dwn
/* --------------------------------------------------- sysreg_bit_set CORTEX_A76AE_CPUPWRCTLR_EL1, CORTEX_A76AE_CORE_PWRDN_EN_MASK
* Enable CPU power down bit in power control register
* ---------------------------------------------------
*/
mrs x0, CORTEX_A76AE_CPUPWRCTLR_EL1
orr x0, x0, #CORTEX_A76AE_CORE_PWRDN_EN_MASK
msr CORTEX_A76AE_CPUPWRCTLR_EL1, x0
isb isb
ret ret
endfunc cortex_a76ae_core_pwr_dwn endfunc cortex_a76ae_core_pwr_dwn