fix(intel): fix bridge enable and disable function

1. hps reset and reboot spec is missing ack clear status step
2. software workaround for bridge timeout
3. f2sdram bridge quick write thru failed
4. bridge timeout workaround for F2SOC and F2SDRAM


Change-Id: Ide4210ff862531f82e083633af385b559ffbe16b
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
This commit is contained in:
Sieu Mun Tang 2024-06-09 23:47:53 +08:00 committed by jit.loon.lim
parent b6f2e376a8
commit 90f5283ec0

View file

@ -1266,4 +1266,4 @@ int socfpga_cpurstrelease(unsigned int cpu_id)
} while (timeout-- > 0);
return RSTMGR_RET_ERROR;
}
}