From 90118bb5c180198db3386c3e1f5be8e32707c2cc Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Fri, 3 Feb 2023 15:30:14 +0000 Subject: [PATCH] refactor(cpufeat): rename ENABLE_SPE_FOR_LOWER_ELS to ENABLE_SPE_FOR_NS At the moment we hardcode the SPE functionality to be available on the non-secure side only, by setting MDCR_EL2.E2PB accordingly. This should be reflected in the feature selection symbol, so rename that to ENABLE_SPE_FOR_NS, to make it clearer that SPE is not supported in the secure world. Change-Id: I3f9b48eab1a45d6ccfcbb9c90a11eeb66867ad9a Signed-off-by: Andre Przywara --- Makefile | 4 ++-- bl31/bl31.mk | 2 +- docs/getting_started/build-options.rst | 2 +- lib/el3_runtime/aarch64/context_mgmt.c | 2 +- make_helpers/defaults.mk | 4 ++-- plat/allwinner/common/allwinner-common.mk | 2 +- plat/arm/board/fvp/fvp_pm.c | 2 +- plat/arm/board/tc/platform.mk | 2 +- plat/qti/msm8916/platform.mk | 2 +- 9 files changed, 11 insertions(+), 11 deletions(-) diff --git a/Makefile b/Makefile index b9ca664e9..16279b603 100644 --- a/Makefile +++ b/Makefile @@ -1096,7 +1096,7 @@ $(eval $(call assert_booleans,\ ENABLE_RUNTIME_INSTRUMENTATION \ ENABLE_SME_FOR_NS \ ENABLE_SME_FOR_SWD \ - ENABLE_SPE_FOR_LOWER_ELS \ + ENABLE_SPE_FOR_NS \ ENABLE_SVE_FOR_NS \ ENABLE_SVE_FOR_SWD \ ERROR_DEPRECATED \ @@ -1237,7 +1237,7 @@ $(eval $(call add_defines,\ ENABLE_RUNTIME_INSTRUMENTATION \ ENABLE_SME_FOR_NS \ ENABLE_SME_FOR_SWD \ - ENABLE_SPE_FOR_LOWER_ELS \ + ENABLE_SPE_FOR_NS \ ENABLE_SVE_FOR_NS \ ENABLE_SVE_FOR_SWD \ ENCRYPT_BL31 \ diff --git a/bl31/bl31.mk b/bl31/bl31.mk index e9590d5d6..b639920e5 100644 --- a/bl31/bl31.mk +++ b/bl31/bl31.mk @@ -87,7 +87,7 @@ BL31_SOURCES += services/std_svc/trng/trng_main.c \ services/std_svc/trng/trng_entropy_pool.c endif -ifeq (${ENABLE_SPE_FOR_LOWER_ELS},1) +ifeq (${ENABLE_SPE_FOR_NS},1) BL31_SOURCES += lib/extensions/spe/spe.c endif diff --git a/docs/getting_started/build-options.rst b/docs/getting_started/build-options.rst index abfc8eccc..9241c3912 100644 --- a/docs/getting_started/build-options.rst +++ b/docs/getting_started/build-options.rst @@ -428,7 +428,7 @@ Common build options handle context switching for SME, SVE, and FPU/SIMD registers to ensure that no data is leaked to non-secure world. This is experimental. Default is 0. -- ``ENABLE_SPE_FOR_LOWER_ELS`` : Boolean option to enable Statistical Profiling +- ``ENABLE_SPE_FOR_NS`` : Boolean option to enable Statistical Profiling extensions. This is an optional architectural feature for AArch64. The default is 1 but is automatically disabled when the target architecture is AArch32. diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c index e1c671d8b..50fddc502 100644 --- a/lib/el3_runtime/aarch64/context_mgmt.c +++ b/lib/el3_runtime/aarch64/context_mgmt.c @@ -482,7 +482,7 @@ void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep) static void manage_extensions_nonsecure(bool el2_unused, cpu_context_t *ctx) { #if IMAGE_BL31 -#if ENABLE_SPE_FOR_LOWER_ELS +#if ENABLE_SPE_FOR_NS spe_enable(el2_unused); #endif diff --git a/make_helpers/defaults.mk b/make_helpers/defaults.mk index d8c621078..63ac82e6d 100644 --- a/make_helpers/defaults.mk +++ b/make_helpers/defaults.mk @@ -355,11 +355,11 @@ V := 0 WARMBOOT_ENABLE_DCACHE_EARLY := 0 # Build option to enable/disable the Statistical Profiling Extensions -ENABLE_SPE_FOR_LOWER_ELS := 1 +ENABLE_SPE_FOR_NS := 1 # SPE is only supported on AArch64 so disable it on AArch32. ifeq (${ARCH},aarch32) - override ENABLE_SPE_FOR_LOWER_ELS := 0 + override ENABLE_SPE_FOR_NS := 0 endif # Include Memory Tagging Extension registers in cpu context. This must be set diff --git a/plat/allwinner/common/allwinner-common.mk b/plat/allwinner/common/allwinner-common.mk index 61c1dbe3e..3164a255a 100644 --- a/plat/allwinner/common/allwinner-common.mk +++ b/plat/allwinner/common/allwinner-common.mk @@ -87,7 +87,7 @@ endif COLD_BOOT_SINGLE_CPU := 1 # Do not enable SPE (not supported on ARM v8.0). -ENABLE_SPE_FOR_LOWER_ELS := 0 +ENABLE_SPE_FOR_NS := 0 # Do not enable SVE (not supported on ARM v8.0). ENABLE_SVE_FOR_NS := 0 diff --git a/plat/arm/board/fvp/fvp_pm.c b/plat/arm/board/fvp/fvp_pm.c index 6b9d6184c..9d9386230 100644 --- a/plat/arm/board/fvp/fvp_pm.c +++ b/plat/arm/board/fvp/fvp_pm.c @@ -53,7 +53,7 @@ static void fvp_cluster_pwrdwn_common(void) { uint64_t mpidr = read_mpidr_el1(); -#if ENABLE_SPE_FOR_LOWER_ELS +#if ENABLE_SPE_FOR_NS /* * On power down we need to disable statistical profiling extensions * before exiting coherency. diff --git a/plat/arm/board/tc/platform.mk b/plat/arm/board/tc/platform.mk index 05dca915e..5f4148c17 100644 --- a/plat/arm/board/tc/platform.mk +++ b/plat/arm/board/tc/platform.mk @@ -161,7 +161,7 @@ override CTX_INCLUDE_AARCH32_REGS := 0 override CTX_INCLUDE_PAUTH_REGS := 1 -override ENABLE_SPE_FOR_LOWER_ELS := 0 +override ENABLE_SPE_FOR_NS := 0 override ENABLE_AMU := 1 override ENABLE_AMU_AUXILIARY_COUNTERS := 1 diff --git a/plat/qti/msm8916/platform.mk b/plat/qti/msm8916/platform.mk index e516ceadb..60fb25d41 100644 --- a/plat/qti/msm8916/platform.mk +++ b/plat/qti/msm8916/platform.mk @@ -44,7 +44,7 @@ WARMBOOT_ENABLE_DCACHE_EARLY := 1 # Disable features unsupported in ARMv8.0 ENABLE_AMU := 0 -ENABLE_SPE_FOR_LOWER_ELS := 0 +ENABLE_SPE_FOR_NS := 0 ENABLE_SVE_FOR_NS := 0 # MSM8916 uses ARM Cortex-A53 r0p0 so likely all the errata apply