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https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-17 01:54:22 +00:00
feat(qemu): load and run RMM image
When RME is enabled, jump to the RMM image before BL33. When using semihosting rather than FIP, the image called "rmm.bin" is loaded from the runtime directory. Change-Id: I15863410b1e505aa502276b339b22a2ddcb0b745 Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
This commit is contained in:
parent
6cd113fe06
commit
8ffe0b2ede
4 changed files with 139 additions and 5 deletions
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2017-2024, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -67,11 +67,28 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
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# ifdef QEMU_LOAD_BL32
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.next_handoff_image_id = BL32_IMAGE_ID,
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# elif ENABLE_RME
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.next_handoff_image_id = RMM_IMAGE_ID,
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# else
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.next_handoff_image_id = BL33_IMAGE_ID,
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# endif
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},
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#endif /* __aarch64__ */
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#if ENABLE_RME
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/* Fill RMM related information */
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{ .image_id = RMM_IMAGE_ID,
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SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
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VERSION_2, entry_point_info_t, EP_REALM | EXECUTABLE),
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.ep_info.pc = RMM_BASE,
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SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
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VERSION_2, image_info_t, 0),
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.image_info.image_base = RMM_BASE,
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.image_info.image_max_size = RMM_LIMIT - RMM_BASE,
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.next_handoff_image_id = BL33_IMAGE_ID,
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},
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#endif /* ENABLE_RME */
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# ifdef QEMU_LOAD_BL32
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#ifdef __aarch64__
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@ -95,7 +112,11 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
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.image_info.image_base = BL32_BASE,
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.image_info.image_max_size = BL32_LIMIT - BL32_BASE,
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#if ENABLE_RME
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.next_handoff_image_id = RMM_IMAGE_ID,
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#else
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.next_handoff_image_id = BL33_IMAGE_ID,
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#endif
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},
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/*
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@ -41,6 +41,9 @@
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*/
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static entry_point_info_t bl32_image_ep_info;
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static entry_point_info_t bl33_image_ep_info;
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#if ENABLE_RME
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static entry_point_info_t rmm_image_ep_info;
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#endif
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/*******************************************************************************
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* Perform any BL3-1 early platform setup. Here is an opportunity to copy
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@ -73,13 +76,18 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
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bl_params_node_t *bl_params = params_from_bl2->head;
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/*
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* Copy BL33 and BL32 (if present), entry point information.
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* Copy BL33, BL32 and RMM (if present), entry point information.
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* They are stored in Secure RAM, in BL2's address space.
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*/
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while (bl_params) {
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if (bl_params->image_id == BL32_IMAGE_ID)
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bl32_image_ep_info = *bl_params->ep_info;
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#if ENABLE_RME
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if (bl_params->image_id == RMM_IMAGE_ID)
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rmm_image_ep_info = *bl_params->ep_info;
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#endif
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if (bl_params->image_id == BL33_IMAGE_ID)
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bl33_image_ep_info = *bl_params->ep_info;
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@ -88,6 +96,10 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
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if (!bl33_image_ep_info.pc)
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panic();
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#if ENABLE_RME
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if (!rmm_image_ep_info.pc)
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panic();
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#endif
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}
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void bl31_plat_arch_setup(void)
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@ -155,8 +167,18 @@ entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
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entry_point_info_t *next_image_info;
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assert(sec_state_is_valid(type));
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next_image_info = (type == NON_SECURE)
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? &bl33_image_ep_info : &bl32_image_ep_info;
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if (type == NON_SECURE) {
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next_image_info = &bl33_image_ep_info;
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}
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#if ENABLE_RME
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else if (type == REALM) {
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next_image_info = &rmm_image_ep_info;
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}
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#endif
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else {
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next_image_info = &bl32_image_ep_info;
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}
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/*
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* None of the images on the ARM development platforms can have 0x0
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* as the entrypoint
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@ -11,6 +11,9 @@
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#include <common/bl_common.h>
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#include <lib/xlat_tables/xlat_tables_v2.h>
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#include <services/el3_spmc_ffa_memory.h>
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#if ENABLE_RME
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#include <services/rmm_core_manifest.h>
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#endif
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#include <plat/common/platform.h>
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#include "qemu_private.h"
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@ -190,3 +193,76 @@ int plat_spmd_handle_group0_interrupt(uint32_t intid)
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return -1;
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}
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#endif /*defined(SPD_spmd) && (SPMC_AT_EL3 == 0)*/
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#if ENABLE_RME
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/*
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* Get a pointer to the RMM-EL3 Shared buffer and return it
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* through the pointer passed as parameter.
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*
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* This function returns the size of the shared buffer.
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*/
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size_t plat_rmmd_get_el3_rmm_shared_mem(uintptr_t *shared)
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{
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*shared = (uintptr_t)RMM_SHARED_BASE;
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return (size_t)RMM_SHARED_SIZE;
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}
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int plat_rmmd_load_manifest(struct rmm_manifest *manifest)
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{
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uint64_t checksum;
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uintptr_t base;
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uint64_t size;
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struct ns_dram_bank *bank_ptr;
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assert(manifest != NULL);
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manifest->version = RMMD_MANIFEST_VERSION;
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manifest->padding = 0U; /* RES0 */
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manifest->plat_data = (uintptr_t)NULL;
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manifest->plat_dram.num_banks = 1;
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/*
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* Array ns_dram_banks[] follows ns_dram_info structure:
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*
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* +-----------------------------------+
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* | offset | field | comment |
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* +----------+-----------+------------+
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* | 0 | version | 0x00000002 |
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* +----------+-----------+------------+
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* | 4 | padding | 0x00000000 |
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* +----------+-----------+------------+
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* | 8 | plat_data | NULL |
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* +----------+-----------+------------+
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* | 16 | num_banks | |
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* +----------+-----------+ |
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* | 24 | banks | plat_dram |
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* +----------+-----------+ |
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* | 32 | checksum | |
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* +----------+-----------+------------+
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* | 40 | base 0 | |
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* +----------+-----------+ bank[0] |
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* | 48 | size 0 | |
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* +----------+-----------+------------+
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*/
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bank_ptr = (struct ns_dram_bank *)
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((uintptr_t)&manifest->plat_dram.checksum +
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sizeof(manifest->plat_dram.checksum));
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manifest->plat_dram.banks = bank_ptr;
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/* Calculate checksum of plat_dram structure */
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checksum = 1 + (uint64_t)bank_ptr;
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base = NS_DRAM0_BASE;
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size = NS_DRAM0_SIZE;
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bank_ptr[0].base = base;
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bank_ptr[0].size = size;
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checksum += base + size;
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/* Checksum must be 0 */
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manifest->plat_dram.checksum = ~checksum + 1UL;
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return 0;
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}
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#endif /* ENABLE_RME */
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#define BL32_EXTRA1_IMAGE_NAME "bl32_extra1.bin"
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#define BL32_EXTRA2_IMAGE_NAME "bl32_extra2.bin"
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#define BL33_IMAGE_NAME "bl33.bin"
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#define RMM_IMAGE_NAME "rmm.bin"
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#if TRUSTED_BOARD_BOOT
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#define TRUSTED_BOOT_FW_CERT_NAME "tb_fw.crt"
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.uuid = UUID_NON_TRUSTED_FIRMWARE_BL33,
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};
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static const io_uuid_spec_t rmm_uuid_spec = {
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.uuid = UUID_REALM_MONITOR_MGMT_FIRMWARE,
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};
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#if TRUSTED_BOARD_BOOT
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static const io_uuid_spec_t tb_fw_cert_uuid_spec = {
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.uuid = UUID_TRUSTED_BOOT_FW_CERT,
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.path = BL33_IMAGE_NAME,
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.mode = FOPEN_MODE_RB
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},
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[RMM_IMAGE_ID] = {
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.path = RMM_IMAGE_NAME,
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.mode = FOPEN_MODE_RB
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},
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#if TRUSTED_BOARD_BOOT
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[TRUSTED_BOOT_FW_CERT_ID] = {
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.path = TRUSTED_BOOT_FW_CERT_NAME,
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(uintptr_t)&bl33_uuid_spec,
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open_fip
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},
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[RMM_IMAGE_ID] = {
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&fip_dev_handle,
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(uintptr_t)&rmm_uuid_spec,
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open_fip
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},
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#if TRUSTED_BOARD_BOOT
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[TRUSTED_BOOT_FW_CERT_ID] = {
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&fip_dev_handle,
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