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Merge changes from topic "xlnx_handoff_changes" into integration

Browse source 
* changes:
  chore(xilinx): update warning message
  feat(versal-net): add cluster check in handoff parameters
  feat(versal-net): get the handoff params using IPI
  chore(xilinx): replace fsbl with xbl
This commit is contained in:
Joanna Farley 2023-06-30 12:59:37 +02:00 • committed by TrustedFirmware Code Review
commit 8e31faa05b
5 changed files with 186 additions and 117 deletions
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26
plat/xilinx/common/include/plat_startup.h
View file

@ -10,34 +10,34 @@
#include <common/bl_common.h>
/* For FSBL handover */
enum fsbl_handoff {
FSBL_HANDOFF_SUCCESS = 0,
FSBL_HANDOFF_NO_STRUCT,
FSBL_HANDOFF_INVAL_STRUCT,
FSBL_HANDOFF_TOO_MANY_PARTS
/* For Xilinx bootloader XBL handover */
enum xbl_handoff {
XBL_HANDOFF_SUCCESS = 0,
XBL_HANDOFF_NO_STRUCT,
XBL_HANDOFF_INVAL_STRUCT,
XBL_HANDOFF_TOO_MANY_PARTS
};
#define FSBL_MAX_PARTITIONS 8U
#define XBL_MAX_PARTITIONS 8U
/* Structure corresponding to each partition entry */
struct xfsbl_partition {
struct xbl_partition {
uint64_t entry_point;
uint64_t flags;
};
/* Structure for handoff parameters to TrustedFirmware-A (TF-A) */
struct xfsbl_tfa_handoff_params {
struct xbl_handoff_params {
uint8_t magic[4];
uint32_t num_entries;
struct xfsbl_partition partition[FSBL_MAX_PARTITIONS];
struct xbl_partition partition[XBL_MAX_PARTITIONS];
};
#define TFA_HANDOFF_PARAMS_MAX_SIZE sizeof(struct xfsbl_tfa_handoff_params)
#define HANDOFF_PARAMS_MAX_SIZE sizeof(struct xbl_handoff_params)
enum fsbl_handoff fsbl_tfa_handover(entry_point_info_t *bl32,
enum xbl_handoff xbl_handover(entry_point_info_t *bl32,
entry_point_info_t *bl33,
uint64_t tfa_handoff_addr);
uint64_t handoff_addr);
/* JEDEC Standard Manufacturer's Identification Code and Bank ID JEP106 */
#define JEDEC_XILINX_MFID U(0x49)

227
plat/xilinx/common/plat_startup.c
View file

@ -15,7 +15,7 @@
/*
* TFAHandoffParams
* HandoffParams
* Parameter bitfield encoding
* -----------------------------------------------------------------------------
* Exec State 0 0 -> Aarch64, 1-> Aarch32
@ -23,94 +23,104 @@
* secure (TZ) 2 0 -> Non secure, 1 -> secure
* EL 3:4 00 -> EL0, 01 -> EL1, 10 -> EL2, 11 -> EL3
* CPU# 5:6 00 -> A53_0, 01 -> A53_1, 10 -> A53_2, 11 -> A53_3
* Reserved 7:10 Reserved
* Cluster# 11:12 00 -> Cluster 0, 01 -> Cluster 1, 10 -> Cluster 2,
* 11 -> Cluster (Applicable for Versal NET only).
* Reserved 13:16 Reserved
*/
#define FSBL_FLAGS_ESTATE_SHIFT 0U
#define FSBL_FLAGS_ESTATE_MASK (1U << FSBL_FLAGS_ESTATE_SHIFT)
#define FSBL_FLAGS_ESTATE_A64 0U
#define FSBL_FLAGS_ESTATE_A32 1U
#define XBL_FLAGS_ESTATE_SHIFT 0U
#define XBL_FLAGS_ESTATE_MASK (1U << XBL_FLAGS_ESTATE_SHIFT)
#define XBL_FLAGS_ESTATE_A64 0U
#define XBL_FLAGS_ESTATE_A32 1U
#define FSBL_FLAGS_ENDIAN_SHIFT 1U
#define FSBL_FLAGS_ENDIAN_MASK (1U << FSBL_FLAGS_ENDIAN_SHIFT)
#define FSBL_FLAGS_ENDIAN_LE 0U
#define FSBL_FLAGS_ENDIAN_BE 1U
#define XBL_FLAGS_ENDIAN_SHIFT 1U
#define XBL_FLAGS_ENDIAN_MASK (1U << XBL_FLAGS_ENDIAN_SHIFT)
#define XBL_FLAGS_ENDIAN_LE 0U
#define XBL_FLAGS_ENDIAN_BE 1U
#define FSBL_FLAGS_TZ_SHIFT 2U
#define FSBL_FLAGS_TZ_MASK (1U << FSBL_FLAGS_TZ_SHIFT)
#define FSBL_FLAGS_NON_SECURE 0U
#define FSBL_FLAGS_SECURE 1U
#define XBL_FLAGS_TZ_SHIFT 2U
#define XBL_FLAGS_TZ_MASK (1U << XBL_FLAGS_TZ_SHIFT)
#define XBL_FLAGS_NON_SECURE 0U
#define XBL_FLAGS_SECURE 1U
#define FSBL_FLAGS_EL_SHIFT 3U
#define FSBL_FLAGS_EL_MASK (3U << FSBL_FLAGS_EL_SHIFT)
#define FSBL_FLAGS_EL0 0U
#define FSBL_FLAGS_EL1 1U
#define FSBL_FLAGS_EL2 2U
#define FSBL_FLAGS_EL3 3U
#define XBL_FLAGS_EL_SHIFT 3U
#define XBL_FLAGS_EL_MASK (3U << XBL_FLAGS_EL_SHIFT)
#define XBL_FLAGS_EL0 0U
#define XBL_FLAGS_EL1 1U
#define XBL_FLAGS_EL2 2U
#define XBL_FLAGS_EL3 3U
#define FSBL_FLAGS_CPU_SHIFT 5U
#define FSBL_FLAGS_CPU_MASK (3U << FSBL_FLAGS_CPU_SHIFT)
#define FSBL_FLAGS_A53_0 0U
#define FSBL_FLAGS_A53_1 1U
#define FSBL_FLAGS_A53_2 2U
#define FSBL_FLAGS_A53_3 3U
#define XBL_FLAGS_CPU_SHIFT 5U
#define XBL_FLAGS_CPU_MASK (3U << XBL_FLAGS_CPU_SHIFT)
#define XBL_FLAGS_A53_0 0U
#define XBL_FLAGS_A53_1 1U
#define XBL_FLAGS_A53_2 2U
#define XBL_FLAGS_A53_3 3U
#if defined(PLAT_versal_net)
#define XBL_FLAGS_CLUSTER_SHIFT 11U
#define XBL_FLAGS_CLUSTER_MASK GENMASK(11, 12)
#define XBL_FLAGS_CLUSTER_0 0U
#endif /* PLAT_versal_net */
/**
* get_fsbl_cpu() - Get the target CPU for partition.
* get_xbl_cpu() - Get the target CPU for partition.
* @partition: Pointer to partition struct.
*
* Return: FSBL_FLAGS_A53_0, FSBL_FLAGS_A53_1, FSBL_FLAGS_A53_2 or
* FSBL_FLAGS_A53_3.
* Return: XBL_FLAGS_A53_0, XBL_FLAGS_A53_1, XBL_FLAGS_A53_2 or XBL_FLAGS_A53_3.
*
*/
static int32_t get_fsbl_cpu(const struct xfsbl_partition *partition)
static int32_t get_xbl_cpu(const struct xbl_partition *partition)
{
uint64_t flags = partition->flags & FSBL_FLAGS_CPU_MASK;
uint64_t flags = partition->flags & XBL_FLAGS_CPU_MASK;
return flags >> FSBL_FLAGS_CPU_SHIFT;
return flags >> XBL_FLAGS_CPU_SHIFT;
}
/**
* get_fsbl_el() - Get the target exception level for partition.
* get_xbl_el() - Get the target exception level for partition.
* @partition: Pointer to partition struct.
*
* Return: FSBL_FLAGS_EL0, FSBL_FLAGS_EL1, FSBL_FLAGS_EL2 or FSBL_FLAGS_EL3.
* Return: XBL_FLAGS_EL0, XBL_FLAGS_EL1, XBL_FLAGS_EL2 or XBL_FLAGS_EL3.
*
*/
static int32_t get_fsbl_el(const struct xfsbl_partition *partition)
static int32_t get_xbl_el(const struct xbl_partition *partition)
{
uint64_t flags = partition->flags & FSBL_FLAGS_EL_MASK;
uint64_t flags = partition->flags & XBL_FLAGS_EL_MASK;
return flags >> FSBL_FLAGS_EL_SHIFT;
return flags >> XBL_FLAGS_EL_SHIFT;
}
/**
* get_fsbl_ss() - Get the target security state for partition.
* get_xbl_ss() - Get the target security state for partition.
* @partition: Pointer to partition struct.
*
* Return: FSBL_FLAGS_NON_SECURE or FSBL_FLAGS_SECURE.
* Return: XBL_FLAGS_NON_SECURE or XBL_FLAGS_SECURE.
*
*/
static int32_t get_fsbl_ss(const struct xfsbl_partition *partition)
static int32_t get_xbl_ss(const struct xbl_partition *partition)
{
uint64_t flags = partition->flags & FSBL_FLAGS_TZ_MASK;
uint64_t flags = partition->flags & XBL_FLAGS_TZ_MASK;
return flags >> FSBL_FLAGS_TZ_SHIFT;
return flags >> XBL_FLAGS_TZ_SHIFT;
}
/**
* get_fsbl_endian() - Get the target endianness for partition.
* get_xbl_endian() - Get the target endianness for partition.
* @partition: Pointer to partition struct.
*
* Return: SPSR_E_LITTLE or SPSR_E_BIG.
*
*/
static int32_t get_fsbl_endian(const struct xfsbl_partition *partition)
static int32_t get_xbl_endian(const struct xbl_partition *partition)
{
uint64_t flags = partition->flags & FSBL_FLAGS_ENDIAN_MASK;
uint64_t flags = partition->flags & XBL_FLAGS_ENDIAN_MASK;
flags >>= FSBL_FLAGS_ENDIAN_SHIFT;
flags >>= XBL_FLAGS_ENDIAN_SHIFT;
if (flags == FSBL_FLAGS_ENDIAN_BE) {
if (flags == XBL_FLAGS_ENDIAN_BE) {
return SPSR_E_BIG;
} else {
return SPSR_E_LITTLE;
@ -118,58 +128,73 @@ static int32_t get_fsbl_endian(const struct xfsbl_partition *partition)
}
/**
* get_fsbl_estate() - Get the target execution state for partition.
* get_xbl_estate() - Get the target execution state for partition.
* @partition: Pointer to partition struct.
*
* Return: FSBL_FLAGS_ESTATE_A32 or FSBL_FLAGS_ESTATE_A64.
* Return: XBL_FLAGS_ESTATE_A32 or XBL_FLAGS_ESTATE_A64.
*
*/
static int32_t get_fsbl_estate(const struct xfsbl_partition *partition)
static int32_t get_xbl_estate(const struct xbl_partition *partition)
{
uint64_t flags = partition->flags & FSBL_FLAGS_ESTATE_MASK;
uint64_t flags = partition->flags & XBL_FLAGS_ESTATE_MASK;
return flags >> FSBL_FLAGS_ESTATE_SHIFT;
return flags >> XBL_FLAGS_ESTATE_SHIFT;
}
#if defined(PLAT_versal_net)
/**
* fsbl_tfa_handover() - Populates the bl32 and bl33 image info structures.
* get_xbl_cluster - Get the cluster number
* @partition: pointer to the partition structure.
*
* Return: cluster number for the partition.
*/
static int32_t get_xbl_cluster(const struct xbl_partition *partition)
{
uint64_t flags = partition->flags & XBL_FLAGS_CLUSTER_MASK;
return (int32_t)(flags >> XBL_FLAGS_CLUSTER_SHIFT);
}
#endif /* PLAT_versal_net */
/**
* xbl_tfa_handover() - Populates the bl32 and bl33 image info structures.
* @bl32: BL32 image info structure.
* @bl33: BL33 image info structure.
* @tfa_handoff_addr: TF-A handoff address.
*
* Process the handoff parameters from the FSBL and populate the BL32 and BL33
* Process the handoff parameters from the XBL and populate the BL32 and BL33
* image info structures accordingly.
*
* Return: Return the status of the handoff. The value will be from the
* fsbl_handoff enum.
* xbl_handoff enum.
*
*/
enum fsbl_handoff fsbl_tfa_handover(entry_point_info_t *bl32,
enum xbl_handoff xbl_handover(entry_point_info_t *bl32,
entry_point_info_t *bl33,
uint64_t tfa_handoff_addr)
uint64_t handoff_addr)
{
const struct xfsbl_tfa_handoff_params *TFAHandoffParams;
if (!tfa_handoff_addr) {
WARN("BL31: No TFA handoff structure passed\n");
return FSBL_HANDOFF_NO_STRUCT;
const struct xbl_handoff_params *HandoffParams;
if (!handoff_addr) {
WARN("BL31: No handoff structure passed\n");
return XBL_HANDOFF_NO_STRUCT;
}
TFAHandoffParams = (struct xfsbl_tfa_handoff_params *)tfa_handoff_addr;
if ((TFAHandoffParams->magic[0] != 'X') ||
(TFAHandoffParams->magic[1] != 'L') ||
(TFAHandoffParams->magic[2] != 'N') ||
(TFAHandoffParams->magic[3] != 'X')) {
ERROR("BL31: invalid TF-A handoff structure at %" PRIx64 "\n",
tfa_handoff_addr);
return FSBL_HANDOFF_INVAL_STRUCT;
HandoffParams = (struct xbl_handoff_params *)handoff_addr;
if ((HandoffParams->magic[0] != 'X') ||
(HandoffParams->magic[1] != 'L') ||
(HandoffParams->magic[2] != 'N') ||
(HandoffParams->magic[3] != 'X')) {
ERROR("BL31: invalid handoff structure at %" PRIx64 "\n", handoff_addr);
return XBL_HANDOFF_INVAL_STRUCT;
}
VERBOSE("BL31: TF-A handoff params at:0x%" PRIx64 ", entries:%u\n",
tfa_handoff_addr, TFAHandoffParams->num_entries);
if (TFAHandoffParams->num_entries > FSBL_MAX_PARTITIONS) {
handoff_addr, HandoffParams->num_entries);
if (HandoffParams->num_entries > XBL_MAX_PARTITIONS) {
ERROR("BL31: TF-A handoff params: too many partitions (%u/%u)\n",
TFAHandoffParams->num_entries, FSBL_MAX_PARTITIONS);
return FSBL_HANDOFF_TOO_MANY_PARTS;
HandoffParams->num_entries, XBL_MAX_PARTITIONS);
return XBL_HANDOFF_TOO_MANY_PARTS;
}
/*
@ -177,43 +202,55 @@ enum fsbl_handoff fsbl_tfa_handover(entry_point_info_t *bl32,
* (bl32, bl33). I.e. the last applicable images in the handoff
* structure will be used for the hand off
*/
for (size_t i = 0; i < TFAHandoffParams->num_entries; i++) {
for (size_t i = 0; i < HandoffParams->num_entries; i++) {
entry_point_info_t *image;
int32_t target_estate, target_secure, target_cpu;
uint32_t target_endianness, target_el;
VERBOSE("BL31: %zd: entry:0x%" PRIx64 ", flags:0x%" PRIx64 "\n", i,
TFAHandoffParams->partition[i].entry_point,
TFAHandoffParams->partition[i].flags);
HandoffParams->partition[i].entry_point,
HandoffParams->partition[i].flags);
target_cpu = get_fsbl_cpu(&TFAHandoffParams->partition[i]);
if (target_cpu != FSBL_FLAGS_A53_0) {
#if defined(PLAT_versal_net)
uint32_t target_cluster;
target_cluster = get_xbl_cluster(&HandoffParams->partition[i]);
if (target_cluster != XBL_FLAGS_CLUSTER_0) {
WARN("BL31: invalid target Cluster (%i)\n",
target_cluster);
continue;
}
#endif /* PLAT_versal_net */
target_cpu = get_xbl_cpu(&HandoffParams->partition[i]);
if (target_cpu != XBL_FLAGS_A53_0) {
WARN("BL31: invalid target CPU (%i)\n", target_cpu);
continue;
}
target_el = get_fsbl_el(&TFAHandoffParams->partition[i]);
if ((target_el == FSBL_FLAGS_EL3) ||
(target_el == FSBL_FLAGS_EL0)) {
WARN("BL31: invalid exception level (%i)\n", target_el);
target_el = get_xbl_el(&HandoffParams->partition[i]);
if ((target_el == XBL_FLAGS_EL3) ||
(target_el == XBL_FLAGS_EL0)) {
WARN("BL31: invalid target exception level(%i)\n",
target_el);
continue;
}
target_secure = get_fsbl_ss(&TFAHandoffParams->partition[i]);
if (target_secure == FSBL_FLAGS_SECURE &&
target_el == FSBL_FLAGS_EL2) {
target_secure = get_xbl_ss(&HandoffParams->partition[i]);
if (target_secure == XBL_FLAGS_SECURE &&
target_el == XBL_FLAGS_EL2) {
WARN("BL31: invalid security state (%i) for exception level (%i)\n",
target_secure, target_el);
continue;
}
target_estate = get_fsbl_estate(&TFAHandoffParams->partition[i]);
target_endianness = get_fsbl_endian(&TFAHandoffParams->partition[i]);
target_estate = get_xbl_estate(&HandoffParams->partition[i]);
target_endianness = get_xbl_endian(&HandoffParams->partition[i]);
if (target_secure == FSBL_FLAGS_SECURE) {
if (target_secure == XBL_FLAGS_SECURE) {
image = bl32;
if (target_estate == FSBL_FLAGS_ESTATE_A32) {
if (target_estate == XBL_FLAGS_ESTATE_A32) {
bl32->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM,
target_endianness,
DISABLE_ALL_EXCEPTIONS);
@ -224,8 +261,8 @@ enum fsbl_handoff fsbl_tfa_handover(entry_point_info_t *bl32,
} else {
image = bl33;
if (target_estate == FSBL_FLAGS_ESTATE_A32) {
if (target_el == FSBL_FLAGS_EL2) {
if (target_estate == XBL_FLAGS_ESTATE_A32) {
if (target_el == XBL_FLAGS_EL2) {
target_el = MODE32_hyp;
} else {
target_el = MODE32_sys;
@ -235,7 +272,7 @@ enum fsbl_handoff fsbl_tfa_handover(entry_point_info_t *bl32,
target_endianness,
DISABLE_ALL_EXCEPTIONS);
} else {
if (target_el == FSBL_FLAGS_EL2) {
if (target_el == XBL_FLAGS_EL2) {
target_el = MODE_EL2;
} else {
target_el = MODE_EL1;
@ -247,10 +284,10 @@ enum fsbl_handoff fsbl_tfa_handover(entry_point_info_t *bl32,
}
VERBOSE("Setting up %s entry point to:%" PRIx64 ", el:%x\n",
target_secure == FSBL_FLAGS_SECURE ? "BL32" : "BL33",
TFAHandoffParams->partition[i].entry_point,
target_secure == XBL_FLAGS_SECURE ? "BL32" : "BL33",
HandoffParams->partition[i].entry_point,
target_el);
image->pc = TFAHandoffParams->partition[i].entry_point;
image->pc = HandoffParams->partition[i].entry_point;
if (target_endianness == SPSR_E_BIG) {
EP_SET_EE(image->h.attr, EP_EE_BIG);
@ -259,5 +296,5 @@ enum fsbl_handoff fsbl_tfa_handover(entry_point_info_t *bl32,
}
}
return FSBL_HANDOFF_SUCCESS;
return XBL_HANDOFF_SUCCESS;
}

12
plat/xilinx/versal/bl31_versal_setup.c
View file

@ -68,9 +68,9 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3)
{
uint64_t tfa_handoff_addr;
uint32_t payload[PAYLOAD_ARG_CNT], max_size = TFA_HANDOFF_PARAMS_MAX_SIZE;
uint32_t payload[PAYLOAD_ARG_CNT], max_size = HANDOFF_PARAMS_MAX_SIZE;
enum pm_ret_status ret_status;
uint64_t addr[TFA_HANDOFF_PARAMS_MAX_SIZE];
uint64_t addr[HANDOFF_PARAMS_MAX_SIZE];
if (VERSAL_CONSOLE_IS(pl011) || (VERSAL_CONSOLE_IS(pl011_1))) {
static console_t versal_runtime_console;
@ -125,14 +125,14 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
tfa_handoff_addr = mmio_read_32(PMC_GLOBAL_GLOB_GEN_STORAGE4);
}
enum fsbl_handoff ret = fsbl_tfa_handover(&bl32_image_ep_info,
enum xbl_handoff ret = xbl_handover(&bl32_image_ep_info,
&bl33_image_ep_info,
tfa_handoff_addr);
if (ret == FSBL_HANDOFF_NO_STRUCT || ret == FSBL_HANDOFF_INVAL_STRUCT) {
if (ret == XBL_HANDOFF_NO_STRUCT || ret == XBL_HANDOFF_INVAL_STRUCT) {
bl31_set_default_config();
} else if (ret == FSBL_HANDOFF_TOO_MANY_PARTS) {
} else if (ret == XBL_HANDOFF_TOO_MANY_PARTS) {
ERROR("BL31: Error too many partitions %u\n", ret);
} else if (ret != FSBL_HANDOFF_SUCCESS) {
} else if (ret != XBL_HANDOFF_SUCCESS) {
panic();
} else {
INFO("BL31: PLM to TF-A handover success %u\n", ret);

32
plat/xilinx/versal_net/bl31_versal_net_setup.c
View file

@ -25,6 +25,9 @@
#include <plat_private.h>
#include <plat_startup.h>
#include <pm_api_sys.h>
#include <pm_client.h>
#include <pm_ipi.h>
#include <versal_net_def.h>
static entry_point_info_t bl32_image_ep_info;
@ -70,6 +73,11 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
{
uint32_t uart_clock;
int32_t rc;
#if !(TFA_NO_PM)
uint64_t tfa_handoff_addr, buff[HANDOFF_PARAMS_MAX_SIZE] = {0};
uint32_t payload[PAYLOAD_ARG_CNT], max_size = HANDOFF_PARAMS_MAX_SIZE;
enum pm_ret_status ret_status;
#endif /* !(TFA_NO_PM) */
board_detection();
@ -136,8 +144,32 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0);
SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
#if !(TFA_NO_PM)
PM_PACK_PAYLOAD4(payload, LOADER_MODULE_ID, 1, PM_LOAD_GET_HANDOFF_PARAMS,
(uintptr_t)buff >> 32U, (uintptr_t)buff, max_size);
ret_status = pm_ipi_send_sync(primary_proc, payload, NULL, 0);
if (ret_status == PM_RET_SUCCESS) {
enum xbl_handoff xbl_ret;
tfa_handoff_addr = (uintptr_t)&buff;
xbl_ret = xbl_handover(&bl32_image_ep_info, &bl33_image_ep_info,
tfa_handoff_addr);
if (xbl_ret != XBL_HANDOFF_SUCCESS) {
ERROR("BL31: PLM to TF-A handover failed %u\n", xbl_ret);
panic();
}
INFO("BL31: PLM to TF-A handover success\n");
} else {
INFO("BL31: setting up default configs\n");
bl31_set_default_config();
}
#else
bl31_set_default_config();
#endif /* !(TFA_NO_PM) */
NOTICE("BL31: Secure code at 0x%lx\n", bl32_image_ep_info.pc);
NOTICE("BL31: Non secure code at 0x%lx\n", bl33_image_ep_info.pc);

6
plat/xilinx/zynqmp/bl31_zynqmp_setup.c
View file

@ -112,11 +112,11 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
if (zynqmp_get_bootmode() == ZYNQMP_BOOTMODE_JTAG) {
bl31_set_default_config();
} else {
/* use parameters from FSBL */
enum fsbl_handoff ret = fsbl_tfa_handover(&bl32_image_ep_info,
/* use parameters from XBL */
enum xbl_handoff ret = xbl_handover(&bl32_image_ep_info,
&bl33_image_ep_info,
tfa_handoff_addr);
if (ret != FSBL_HANDOFF_SUCCESS) {
if (ret != XBL_HANDOFF_SUCCESS) {
panic();
}
}