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feat(stm32mp15): remove OP-TEE shared mem

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The flag STM32MP15_OPTEE_RSV_SHM was disabled and mark deprecated.
Remove the corresponding code.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I948af3e1de4b89815c967a63abe64f285c405ecc
This commit is contained in:
Yann Gautier 2022-06-30 14:40:06 +02:00
parent f2735ebccf
commit 8dd2a64a12
5 changed files with 7 additions and 26 deletions
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2
docs/about/release-information.rst
View file

@ -83,7 +83,7 @@ after which it will be removed.
| | Date | after | |
| | | Release | |
+================================+=============+=========+=========================================================+
| STM32MP15_OPTEE_RSV_SHM | 2.10 | 3.0 | OP-TEE manages its own memory on STM32MP15 |
| | | | |
+--------------------------------+-------------+---------+---------------------------------------------------------+
Removal of Deprecated Drivers

13
fdts/stm32mp15-fw-config.dtsi
View file

@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (c) 2021-2022, STMicroelectronics - All Rights Reserved
* Copyright (c) 2021-2024, STMicroelectronics - All Rights Reserved
*/
#include <common/tbbr/tbbr_img_def.h>
@ -14,12 +14,9 @@
#define DDR_NS_BASE STM32MP_DDR_BASE
#ifdef AARCH32_SP_OPTEE
/* OP-TEE reserved shared memory: located at DDR top or null size */
#define DDR_SHARE_SIZE STM32MP_DDR_SHMEM_SIZE
#define DDR_SHARE_BASE (STM32MP_DDR_BASE + (DDR_SIZE - DDR_SHARE_SIZE))
/* OP-TEE secure memory: located right below OP-TEE reserved shared memory */
/* OP-TEE secure memory: located at DDR top */
#define DDR_SEC_SIZE STM32MP_DDR_S_SIZE
#define DDR_SEC_BASE (DDR_SHARE_BASE - DDR_SEC_SIZE)
#define DDR_SEC_BASE (STM32MP_DDR_BASE + (DDR_SIZE - DDR_SEC_SIZE))
#define DDR_NS_SIZE (DDR_SEC_BASE - DDR_NS_BASE)
#else /* !AARCH32_SP_OPTEE */
#define DDR_NS_SIZE DDR_SIZE
@ -70,10 +67,6 @@
memory-ranges = <
DDR_NS_BASE DDR_NS_SIZE TZC_REGION_S_NONE TZC_REGION_NSEC_ALL_ACCESS_RDWR
DDR_SEC_BASE DDR_SEC_SIZE TZC_REGION_S_RDWR 0
#if STM32MP15_OPTEE_RSV_SHM
DDR_SHARE_BASE DDR_SHARE_SIZE TZC_REGION_S_NONE
TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_A7_ID)
#endif
>;
#else
memory-ranges = <

3
plat/st/stm32mp1/bl2_plat_setup.c
View file

@ -440,8 +440,7 @@ int bl2_plat_handle_post_image_load(unsigned int image_id)
paged_mem_params = get_bl_mem_params_node(BL32_EXTRA2_IMAGE_ID);
if (paged_mem_params != NULL) {
paged_mem_params->image_info.image_base = STM32MP_DDR_BASE +
(dt_get_ddr_size() - STM32MP_DDR_S_SIZE -
STM32MP_DDR_SHMEM_SIZE);
(dt_get_ddr_size() - STM32MP_DDR_S_SIZE);
paged_mem_params->image_info.image_max_size =
STM32MP_DDR_S_SIZE;
}

7
plat/st/stm32mp1/platform.mk
View file

@ -1,5 +1,5 @@
#
# Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
# Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@ -60,11 +60,6 @@ STM32MP_DDR_32BIT_INTERFACE:= 1
# STM32 image header version v1.0
STM32_HEADER_VERSION_MAJOR:= 1
STM32_HEADER_VERSION_MINOR:= 0
# Add OP-TEE reserved shared memory area in mapping
STM32MP15_OPTEE_RSV_SHM := 0
$(eval $(call add_defines,STM32MP15_OPTEE_RSV_SHM))
STM32MP_CRYPTO_ROM_LIB := 1
# Decryption support

8
plat/st/stm32mp1/stm32mp1_fip_def.h
View file

@ -1,5 +1,5 @@
/*
* Copyright (C) 2021-2023, STMicroelectronics - All Rights Reserved
* Copyright (C) 2021-2024, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -7,13 +7,7 @@
#ifndef STM32MP1_FIP_DEF_H
#define STM32MP1_FIP_DEF_H
#if STM32MP15_OPTEE_RSV_SHM
#define STM32MP_DDR_S_SIZE U(0x01E00000) /* 30 MB */
#define STM32MP_DDR_SHMEM_SIZE U(0x00200000) /* 2 MB */
#else
#define STM32MP_DDR_S_SIZE U(0x02000000) /* 32 MB */
#define STM32MP_DDR_SHMEM_SIZE U(0) /* empty */
#endif
#if TRUSTED_BOARD_BOOT && !STM32MP_USE_EXTERNAL_HEAP
#if STM32MP15