mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-17 01:54:22 +00:00
Merge pull request #1706 from Yann-lms/mmc_init_check
MMC init check and STM32MP1 MMC driver improvements
This commit is contained in:
commit
8dc395e3ed
3 changed files with 40 additions and 28 deletions
|
@ -386,7 +386,10 @@ static int mmc_send_op_cond(void)
|
||||||
int ret, n;
|
int ret, n;
|
||||||
unsigned int resp_data[4];
|
unsigned int resp_data[4];
|
||||||
|
|
||||||
mmc_reset_to_idle();
|
ret = mmc_reset_to_idle();
|
||||||
|
if (ret != 0) {
|
||||||
|
return ret;
|
||||||
|
};
|
||||||
|
|
||||||
for (n = 0; n < SEND_OP_COND_MAX_RETRIES; n++) {
|
for (n = 0; n < SEND_OP_COND_MAX_RETRIES; n++) {
|
||||||
ret = mmc_send_cmd(MMC_CMD(1), OCR_SECTOR_MODE |
|
ret = mmc_send_cmd(MMC_CMD(1), OCR_SECTOR_MODE |
|
||||||
|
@ -416,7 +419,10 @@ static int mmc_enumerate(unsigned int clk, unsigned int bus_width)
|
||||||
|
|
||||||
ops->init();
|
ops->init();
|
||||||
|
|
||||||
mmc_reset_to_idle();
|
ret = mmc_reset_to_idle();
|
||||||
|
if (ret != 0) {
|
||||||
|
return ret;
|
||||||
|
};
|
||||||
|
|
||||||
if (mmc_dev_info->mmc_dev_type == MMC_IS_EMMC) {
|
if (mmc_dev_info->mmc_dev_type == MMC_IS_EMMC) {
|
||||||
ret = mmc_send_op_cond();
|
ret = mmc_send_op_cond();
|
||||||
|
|
|
@ -97,7 +97,7 @@
|
||||||
#define SDMMC_STAR_CMDSENT BIT(7)
|
#define SDMMC_STAR_CMDSENT BIT(7)
|
||||||
#define SDMMC_STAR_DATAEND BIT(8)
|
#define SDMMC_STAR_DATAEND BIT(8)
|
||||||
#define SDMMC_STAR_DBCKEND BIT(10)
|
#define SDMMC_STAR_DBCKEND BIT(10)
|
||||||
#define SDMMC_STAR_DPSMACT BIT(11)
|
#define SDMMC_STAR_DPSMACT BIT(12)
|
||||||
#define SDMMC_STAR_RXFIFOHF BIT(15)
|
#define SDMMC_STAR_RXFIFOHF BIT(15)
|
||||||
#define SDMMC_STAR_RXFIFOE BIT(19)
|
#define SDMMC_STAR_RXFIFOE BIT(19)
|
||||||
#define SDMMC_STAR_IDMATE BIT(27)
|
#define SDMMC_STAR_IDMATE BIT(27)
|
||||||
|
@ -266,21 +266,22 @@ static int stm32_sdmmc2_send_cmd_req(struct mmc_cmd *cmd)
|
||||||
|
|
||||||
mmio_write_32(base + SDMMC_CMDR, cmd_reg);
|
mmio_write_32(base + SDMMC_CMDR, cmd_reg);
|
||||||
|
|
||||||
|
status = mmio_read_32(base + SDMMC_STAR);
|
||||||
|
|
||||||
start = get_timer(0);
|
start = get_timer(0);
|
||||||
|
|
||||||
do {
|
while ((status & flags_cmd) == 0U) {
|
||||||
status = mmio_read_32(base + SDMMC_STAR);
|
|
||||||
|
|
||||||
if (get_timer(start) > TIMEOUT_10_MS) {
|
if (get_timer(start) > TIMEOUT_10_MS) {
|
||||||
err = -ETIMEDOUT;
|
err = -ETIMEDOUT;
|
||||||
ERROR("%s: timeout 10ms (cmd = %d,status = %x)\n",
|
ERROR("%s: timeout 10ms (cmd = %d,status = %x)\n",
|
||||||
__func__, cmd->cmd_idx, status);
|
__func__, cmd->cmd_idx, status);
|
||||||
break;
|
goto err_exit;
|
||||||
}
|
}
|
||||||
} while ((status & flags_cmd) == 0U);
|
|
||||||
|
|
||||||
if (((status & (SDMMC_STAR_CTIMEOUT | SDMMC_STAR_CCRCFAIL)) != 0U) &&
|
status = mmio_read_32(base + SDMMC_STAR);
|
||||||
(err == 0)) {
|
}
|
||||||
|
|
||||||
|
if ((status & (SDMMC_STAR_CTIMEOUT | SDMMC_STAR_CCRCFAIL)) != 0U) {
|
||||||
if ((status & SDMMC_STAR_CTIMEOUT) != 0U) {
|
if ((status & SDMMC_STAR_CTIMEOUT) != 0U) {
|
||||||
err = -ETIMEDOUT;
|
err = -ETIMEDOUT;
|
||||||
/*
|
/*
|
||||||
|
@ -300,9 +301,11 @@ static int stm32_sdmmc2_send_cmd_req(struct mmc_cmd *cmd)
|
||||||
ERROR("%s: CRCFAIL (cmd = %d,status = %x)\n",
|
ERROR("%s: CRCFAIL (cmd = %d,status = %x)\n",
|
||||||
__func__, cmd->cmd_idx, status);
|
__func__, cmd->cmd_idx, status);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
goto err_exit;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (((cmd_reg & SDMMC_CMDR_WAITRESP) != 0U) && (err == 0)) {
|
if ((cmd_reg & SDMMC_CMDR_WAITRESP) != 0U) {
|
||||||
if ((cmd->cmd_idx == MMC_CMD(9)) &&
|
if ((cmd->cmd_idx == MMC_CMD(9)) &&
|
||||||
((cmd_reg & SDMMC_CMDR_WAITRESP) == SDMMC_CMDR_WAITRESP)) {
|
((cmd_reg & SDMMC_CMDR_WAITRESP) == SDMMC_CMDR_WAITRESP)) {
|
||||||
/* Need to invert response to match CSD structure */
|
/* Need to invert response to match CSD structure */
|
||||||
|
@ -324,32 +327,26 @@ static int stm32_sdmmc2_send_cmd_req(struct mmc_cmd *cmd)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((flags_data == 0U) || (err != 0)) {
|
if (flags_data == 0U) {
|
||||||
if (flags_data != 0U) {
|
|
||||||
mmio_clrbits_32(base + SDMMC_CMDR, SDMMC_CMDR_CMDTRANS);
|
|
||||||
}
|
|
||||||
|
|
||||||
mmio_write_32(base + SDMMC_ICR, SDMMC_STATIC_FLAGS);
|
mmio_write_32(base + SDMMC_ICR, SDMMC_STATIC_FLAGS);
|
||||||
|
|
||||||
if ((err != 0) && (flags_data != 0U)) {
|
return 0;
|
||||||
return stm32_sdmmc2_stop_transfer();
|
|
||||||
}
|
|
||||||
|
|
||||||
return err;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
status = mmio_read_32(base + SDMMC_STAR);
|
||||||
|
|
||||||
start = get_timer(0);
|
start = get_timer(0);
|
||||||
|
|
||||||
do {
|
while ((status & flags_data) == 0U) {
|
||||||
status = mmio_read_32(base + SDMMC_STAR);
|
|
||||||
|
|
||||||
if (get_timer(start) > TIMEOUT_10_MS) {
|
if (get_timer(start) > TIMEOUT_10_MS) {
|
||||||
ERROR("%s: timeout 10ms (cmd = %d,status = %x)\n",
|
ERROR("%s: timeout 10ms (cmd = %d,status = %x)\n",
|
||||||
__func__, cmd->cmd_idx, status);
|
__func__, cmd->cmd_idx, status);
|
||||||
err = -ETIMEDOUT;
|
err = -ETIMEDOUT;
|
||||||
break;
|
goto err_exit;
|
||||||
}
|
}
|
||||||
} while ((status & flags_data) == 0U);
|
|
||||||
|
status = mmio_read_32(base + SDMMC_STAR);
|
||||||
|
};
|
||||||
|
|
||||||
if ((status & (SDMMC_STAR_DTIMEOUT | SDMMC_STAR_DCRCFAIL |
|
if ((status & (SDMMC_STAR_DTIMEOUT | SDMMC_STAR_DCRCFAIL |
|
||||||
SDMMC_STAR_TXUNDERR | SDMMC_STAR_RXOVERR |
|
SDMMC_STAR_TXUNDERR | SDMMC_STAR_RXOVERR |
|
||||||
|
@ -359,11 +356,16 @@ static int stm32_sdmmc2_send_cmd_req(struct mmc_cmd *cmd)
|
||||||
err = -EIO;
|
err = -EIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
err_exit:
|
||||||
mmio_write_32(base + SDMMC_ICR, SDMMC_STATIC_FLAGS);
|
mmio_write_32(base + SDMMC_ICR, SDMMC_STATIC_FLAGS);
|
||||||
mmio_clrbits_32(base + SDMMC_CMDR, SDMMC_CMDR_CMDTRANS);
|
mmio_clrbits_32(base + SDMMC_CMDR, SDMMC_CMDR_CMDTRANS);
|
||||||
|
|
||||||
if (err != 0) {
|
if (err != 0) {
|
||||||
return stm32_sdmmc2_stop_transfer();
|
int ret_stop = stm32_sdmmc2_stop_transfer();
|
||||||
|
|
||||||
|
if (ret_stop != 0) {
|
||||||
|
return ret_stop;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
return err;
|
return err;
|
||||||
|
|
|
@ -282,7 +282,11 @@ void stm32mp1_io_setup(void)
|
||||||
}
|
}
|
||||||
|
|
||||||
params.device_info = &device_info;
|
params.device_info = &device_info;
|
||||||
stm32_sdmmc2_mmc_init(¶ms);
|
if (stm32_sdmmc2_mmc_init(¶ms) != 0) {
|
||||||
|
ERROR("SDMMC%u init failed\n",
|
||||||
|
boot_context->boot_interface_instance);
|
||||||
|
panic();
|
||||||
|
}
|
||||||
|
|
||||||
/* Open MMC as a block device to read GPT table */
|
/* Open MMC as a block device to read GPT table */
|
||||||
io_result = register_io_dev_block(&mmc_dev_con);
|
io_result = register_io_dev_block(&mmc_dev_con);
|
||||||
|
|
Loading…
Add table
Reference in a new issue