fix(cpus): workaround for Neoverse N1 erratum 2743102

Neoverse N1 erratum 2743102 is a Cat B erratum that applies to
all revisions <=r4p1 and is still open. The workaround is to
insert a dsb before the isb in the power down sequence.

SDEN documentation:
https://developer.arm.com/documentation/SDEN885747/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I81a8793c1a118764df3ac97b67f5e088f56f6a20

docs/design/cpu-specific-build-macros.rst

@@ -399,6 +399,10 @@ For Neoverse N1, the following errata build flags are defined :
    CPU. This needs to be enabled for revisions r3p0, r3p1, r4p0, and r4p1, for
    revisions r0p0, r1p0, and r2p0 there is no workaround.
 
+-  ``ERRATA_N1_2743102``: This applies errata 2743102 workaround to Neoverse-N1
+   CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is
+   still open.
+
 For Neoverse V1, the following errata build flags are defined :
 
 -  ``ERRATA_V1_1618635``: This applies errata 1618635 workaround to Neoverse-V1

lib/cpus/aarch64/neoverse_n1.S

@@ -468,6 +468,30 @@ func check_errata_1946160
 	b	cpu_rev_var_range
 endfunc check_errata_1946160
 
+	/* ----------------------------------------------------
+	 * Errata Workaround for Neoverse N1 Errata #2743102
+	 * This applies to revisions <= r4p1 and is still open.
+	 * x0: variant[4:7] and revision[0:3] of current cpu.
+	 * Shall clobber: x0-x17
+	 * ----------------------------------------------------
+	 */
+func errata_n1_2743102_wa
+	mov	x17, x30
+	bl	check_errata_2743102
+	cbz	x0, 1f
+
+	/* dsb before isb of power down sequence */
+	dsb	sy
+1:
+	ret	x17
+endfunc errata_n1_2743102_wa
+
+func check_errata_2743102
+	/* Applies to all revisions <= r4p1 */
+	mov	x1, #0x41
+	b	cpu_rev_var_ls
+endfunc check_errata_2743102
+
 func check_errata_cve_2022_23960
 #if WORKAROUND_CVE_2022_23960
 	mov	x0, #ERRATA_APPLIES
@@ -613,6 +637,12 @@ func neoverse_n1_core_pwr_dwn
 	mrs	x0, NEOVERSE_N1_CPUPWRCTLR_EL1
 	orr	x0, x0, #NEOVERSE_N1_CORE_PWRDN_EN_MASK
 	msr	NEOVERSE_N1_CPUPWRCTLR_EL1, x0
+#if ERRATA_N1_2743102
+	mov	x15, x30
+	bl	cpu_get_rev_var
+	bl	errata_n1_2743102_wa
+	mov	x30, x15
+#endif /* ERRATA_N1_2743102 */
 	isb
 	ret
 endfunc neoverse_n1_core_pwr_dwn
@@ -645,6 +675,7 @@ func neoverse_n1_errata_report
 	report_errata ERRATA_N1_1542419, neoverse_n1, 1542419
 	report_errata ERRATA_N1_1868343, neoverse_n1, 1868343
 	report_errata ERRATA_N1_1946160, neoverse_n1, 1946160
+	report_errata ERRATA_N1_2743102, neoverse_n1, 2743102
 	report_errata ERRATA_DSU_936184, neoverse_n1, dsu_936184
 	report_errata WORKAROUND_CVE_2022_23960, neoverse_n1, cve_2022_23960
 

lib/cpus/cpu-ops.mk

@@ -450,6 +450,10 @@ ERRATA_N1_1868343	?=0
 # exists in revisions r0p0, r1p0, and r2p0 as well but there is no workaround.
 ERRATA_N1_1946160	?=0
 
+# Flag to apply erratum 2743102 workaround during powerdown. This erratum
+# applies to all revisions <= r4p1 of the Neoverse N1 cpu and is still open.
+ERRATA_N1_2743102	?=0
+
 # Flag to apply erratum 2002655 workaround during reset. This erratum applies
 # to revisions r0p0 of the Neoverse-N2 cpu, it is still open.
 ERRATA_N2_2002655	?=0
@@ -1072,6 +1076,10 @@ $(eval $(call add_define,ERRATA_N1_1868343))
 $(eval $(call assert_boolean,ERRATA_N1_1946160))
 $(eval $(call add_define,ERRATA_N1_1946160))
 
+# Process ERRATA_N1_2743102 flag
+$(eval $(call assert_boolean,ERRATA_N1_2743102))
+$(eval $(call add_define,ERRATA_N1_2743102))
+#
 # Process ERRATA_N2_2002655 flag
 $(eval $(call assert_boolean,ERRATA_N2_2002655))
 $(eval $(call add_define,ERRATA_N2_2002655))