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Merge "fix(cm): update gic el2 sysregs save/restore mechanism" into integration
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commit
885e93f907
1 changed files with 50 additions and 35 deletions
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@ -1134,13 +1134,58 @@ static void el2_sysregs_context_restore_mpam(mpam_t *ctx)
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}
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#endif /* CTX_INCLUDE_MPAM_REGS */
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/* ---------------------------------------------------------------------------
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* The following registers are not added:
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* ICH_AP0R<n>_EL2
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* ICH_AP1R<n>_EL2
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* ICH_LR<n>_EL2
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*
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* NOTE: For a system with S-EL2 present but not enabled, accessing
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* ICC_SRE_EL2 is undefined from EL3. To workaround this change the
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* SCR_EL3.NS = 1 before accessing this register.
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* ---------------------------------------------------------------------------
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*/
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static void el2_sysregs_context_save_gic(el2_sysregs_t *ctx)
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{
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#if defined(SPD_spmd) && SPMD_SPM_AT_SEL2
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write_ctx_reg(ctx, CTX_ICC_SRE_EL2, read_icc_sre_el2());
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#else
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u_register_t scr_el3 = read_scr_el3();
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write_scr_el3(scr_el3 | SCR_NS_BIT);
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isb();
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write_ctx_reg(ctx, CTX_ICC_SRE_EL2, read_icc_sre_el2());
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write_scr_el3(scr_el3);
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isb();
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#endif
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write_ctx_reg(ctx, CTX_ICH_HCR_EL2, read_ich_hcr_el2());
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write_ctx_reg(ctx, CTX_ICH_VMCR_EL2, read_ich_vmcr_el2());
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}
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static void el2_sysregs_context_restore_gic(el2_sysregs_t *ctx)
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{
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#if defined(SPD_spmd) && SPMD_SPM_AT_SEL2
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write_icc_sre_el2(read_ctx_reg(ctx, CTX_ICC_SRE_EL2));
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#else
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u_register_t scr_el3 = read_scr_el3();
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write_scr_el3(scr_el3 | SCR_NS_BIT);
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isb();
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write_icc_sre_el2(read_ctx_reg(ctx, CTX_ICC_SRE_EL2));
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write_scr_el3(scr_el3);
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isb();
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#endif
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write_ich_hcr_el2(read_ctx_reg(ctx, CTX_ICH_HCR_EL2));
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write_ich_vmcr_el2(read_ctx_reg(ctx, CTX_ICH_VMCR_EL2));
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}
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/* -----------------------------------------------------
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* The following registers are not added:
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* AMEVCNTVOFF0<n>_EL2
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* AMEVCNTVOFF1<n>_EL2
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* ICH_AP0R<n>_EL2
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* ICH_AP1R<n>_EL2
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* ICH_LR<n>_EL2
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* -----------------------------------------------------
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*/
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static void el2_sysregs_context_save_common(el2_sysregs_t *ctx)
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@ -1162,22 +1207,6 @@ static void el2_sysregs_context_save_common(el2_sysregs_t *ctx)
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write_ctx_reg(ctx, CTX_HCR_EL2, read_hcr_el2());
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write_ctx_reg(ctx, CTX_HPFAR_EL2, read_hpfar_el2());
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write_ctx_reg(ctx, CTX_HSTR_EL2, read_hstr_el2());
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/*
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* Set the NS bit to be able to access the ICC_SRE_EL2 register
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* TODO: remove with root context
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*/
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u_register_t scr_el3 = read_scr_el3();
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write_scr_el3(scr_el3 | SCR_NS_BIT);
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isb();
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write_ctx_reg(ctx, CTX_ICC_SRE_EL2, read_icc_sre_el2());
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write_scr_el3(scr_el3);
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isb();
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write_ctx_reg(ctx, CTX_ICH_HCR_EL2, read_ich_hcr_el2());
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write_ctx_reg(ctx, CTX_ICH_VMCR_EL2, read_ich_vmcr_el2());
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write_ctx_reg(ctx, CTX_MAIR_EL2, read_mair_el2());
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write_ctx_reg(ctx, CTX_MDCR_EL2, read_mdcr_el2());
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write_ctx_reg(ctx, CTX_SCTLR_EL2, read_sctlr_el2());
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@ -1212,22 +1241,6 @@ static void el2_sysregs_context_restore_common(el2_sysregs_t *ctx)
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write_hcr_el2(read_ctx_reg(ctx, CTX_HCR_EL2));
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write_hpfar_el2(read_ctx_reg(ctx, CTX_HPFAR_EL2));
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write_hstr_el2(read_ctx_reg(ctx, CTX_HSTR_EL2));
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/*
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* Set the NS bit to be able to access the ICC_SRE_EL2 register
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* TODO: remove with root context
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*/
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u_register_t scr_el3 = read_scr_el3();
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write_scr_el3(scr_el3 | SCR_NS_BIT);
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isb();
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write_icc_sre_el2(read_ctx_reg(ctx, CTX_ICC_SRE_EL2));
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write_scr_el3(scr_el3);
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isb();
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write_ich_hcr_el2(read_ctx_reg(ctx, CTX_ICH_HCR_EL2));
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write_ich_vmcr_el2(read_ctx_reg(ctx, CTX_ICH_VMCR_EL2));
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write_mair_el2(read_ctx_reg(ctx, CTX_MAIR_EL2));
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write_mdcr_el2(read_ctx_reg(ctx, CTX_MDCR_EL2));
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write_sctlr_el2(read_ctx_reg(ctx, CTX_SCTLR_EL2));
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@ -1257,6 +1270,7 @@ void cm_el2_sysregs_context_save(uint32_t security_state)
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el2_sysregs_ctx = get_el2_sysregs_ctx(ctx);
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el2_sysregs_context_save_common(el2_sysregs_ctx);
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el2_sysregs_context_save_gic(el2_sysregs_ctx);
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if (is_feat_mte2_supported()) {
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write_ctx_reg(el2_sysregs_ctx, CTX_TFSR_EL2, read_tfsr_el2());
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@ -1336,6 +1350,7 @@ void cm_el2_sysregs_context_restore(uint32_t security_state)
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el2_sysregs_ctx = get_el2_sysregs_ctx(ctx);
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el2_sysregs_context_restore_common(el2_sysregs_ctx);
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el2_sysregs_context_restore_gic(el2_sysregs_ctx);
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if (is_feat_mte2_supported()) {
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write_tfsr_el2(read_ctx_reg(el2_sysregs_ctx, CTX_TFSR_EL2));
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