From 8852fb5b7d94229475446c81cfa58851bc2204ff Mon Sep 17 00:00:00 2001 From: Bipin Ravi Date: Mon, 18 Sep 2023 16:34:13 -0500 Subject: [PATCH] fix(cpus): workaround for Neoverse V2 erratum 2331132 Neoverse V2 erratum 2331132 is a Cat B erratum that applies to all revisions <= r0p2 and is still open. The workaround is to write the value 4'b1001 to the PF_MODE bits in the IMP_CPUECTLR2_EL1 register which will place the data prefetcher in the most conservative mode instead of disabling it. SDEN documentation: https://developer.arm.com/documentation/SDEN2332927/latest Signed-off-by: Bipin Ravi Change-Id: Ic6c76375df465a4ad2e20dd7add7037477d973c1 --- docs/design/cpu-specific-build-macros.rst | 4 ++++ include/lib/cpus/aarch64/neoverse_v2.h | 10 +++++++++- lib/cpus/aarch64/neoverse_v2.S | 7 +++++++ lib/cpus/cpu-ops.mk | 4 ++++ services/std_svc/errata_abi/errata_abi_main.c | 7 ++++--- 5 files changed, 28 insertions(+), 4 deletions(-) diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index 69d372259..283957bc7 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -523,6 +523,10 @@ For Neoverse V1, the following errata build flags are defined : For Neoverse V2, the following errata build flags are defined : +- ``ERRATA_V2_2331132``: This applies errata 2331132 workaround to Neoverse-V2 + CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is still + open. + - ``ERRATA_V2_2719103``: This applies errata 2719103 workaround to Neoverse-V2 CPU, this affects system configurations that do not use and ARM interconnect IP. This needs to be enabled for revisions r0p0 and r0p1. It has been fixed diff --git a/include/lib/cpus/aarch64/neoverse_v2.h b/include/lib/cpus/aarch64/neoverse_v2.h index efb960e5c..321faf926 100644 --- a/include/lib/cpus/aarch64/neoverse_v2.h +++ b/include/lib/cpus/aarch64/neoverse_v2.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, Arm Limited. All rights reserved. + * Copyright (c) 2021-2023, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -23,4 +23,12 @@ #define NEOVERSE_V2_CPUPWRCTLR_EL1 S3_0_C15_C2_7 #define NEOVERSE_V2_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1) +/******************************************************************************* + * CPU Extended Control register 2 specific definitions. + ******************************************************************************/ +#define NEOVERSE_V2_CPUECTLR2_EL1 S3_0_C15_C1_5 +#define NEOVERSE_V2_CPUECTLR2_EL1_PF_MODE_CNSRV ULL(9) +#define NEOVERSE_V2_CPUECTLR2_EL1_PF_MODE_LSB U(11) +#define NEOVERSE_V2_CPUECTLR2_EL1_PF_MODE_WIDTH U(4) + #endif /* NEOVERSE_V2_H */ diff --git a/lib/cpus/aarch64/neoverse_v2.S b/lib/cpus/aarch64/neoverse_v2.S index 36ae4deb7..83488274b 100644 --- a/lib/cpus/aarch64/neoverse_v2.S +++ b/lib/cpus/aarch64/neoverse_v2.S @@ -22,6 +22,13 @@ #error "Neoverse V2 supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0" #endif +workaround_reset_start neoverse_v2, ERRATUM(2331132), ERRATA_V2_2331132 + sysreg_bitfield_insert NEOVERSE_V2_CPUECTLR2_EL1, NEOVERSE_V2_CPUECTLR2_EL1_PF_MODE_CNSRV, \ + NEOVERSE_V2_CPUECTLR2_EL1_PF_MODE_LSB, NEOVERSE_V2_CPUECTLR2_EL1_PF_MODE_WIDTH +workaround_reset_end neoverse_v2, ERRATUM(2331132) + +check_erratum_ls neoverse_v2, ERRATUM(2331132), CPU_REV(0, 2) + workaround_runtime_start neoverse_v2, ERRATUM(2801372), ERRATA_V2_2801372 /* dsb before isb of power down sequence */ dsb sy diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index 8df0a29c5..183c178fc 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -786,6 +786,10 @@ CPU_FLAG_LIST += ERRATA_A510_2666669 # Cortex-A510 cpu and is fixed in r1p3. CPU_FLAG_LIST += ERRATA_A510_2684597 +# Flag to apply erratum 2331132 workaround during reset. This erratum applies +# to revisions r0p0, r0p1 and r0p2. It is still open. +CPU_FLAG_LIST += ERRATA_V2_2331132 + # Flag to apply erratum 2719103 workaround for non-arm interconnect ip. This # erratum applies to revisions r0p0, rop1. Fixed in r0p2. CPU_FLAG_LIST += ERRATA_V2_2719103 diff --git a/services/std_svc/errata_abi/errata_abi_main.c b/services/std_svc/errata_abi/errata_abi_main.c index 71a907b75..1bf0a734f 100644 --- a/services/std_svc/errata_abi/errata_abi_main.c +++ b/services/std_svc/errata_abi/errata_abi_main.c @@ -399,10 +399,11 @@ struct em_cpu_list cpu_list[] = { { .cpu_partnumber = NEOVERSE_V2_MIDR, .cpu_errata_list = { - [0] = {2719103, 0x00, 0x01, ERRATA_V2_2719103, \ + [0] = {2331132, 0x00, 0x02, ERRATA_V2_2331132}, + [1] = {2719103, 0x00, 0x01, ERRATA_V2_2719103, \ ERRATA_NON_ARM_INTERCONNECT}, - [1] = {2801372, 0x00, 0x01, ERRATA_V2_2801372}, - [2 ... ERRATA_LIST_END] = UNDEF_ERRATA, + [2] = {2801372, 0x00, 0x01, ERRATA_V2_2801372}, + [3 ... ERRATA_LIST_END] = UNDEF_ERRATA, } }, #endif /* NEOVERSE_V2_H_INC */