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Merge "fix(gicv3): wait rwp when gicr_ctrl.enablelpis from 1 to 0" into integration

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Madhukar Pappireddy 2024-08-13 23:43:13 +02:00 • committed by TrustedFirmware Code Review
commit 862521bb12
1 changed files with 2 additions and 0 deletions
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drivers/arm/gic/v3/gicv3_main.c
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@ -686,6 +686,8 @@ void gicv3_rdistif_init_restore(unsigned int proc_num,
gicr_write_ctlr(gicr_base,
rdist_ctx->gicr_ctlr & ~(GICR_CTLR_EN_LPIS_BIT));
gicr_wait_for_pending_write(gicr_base);
/* Restore registers' content */
gicr_write_propbaser(gicr_base, rdist_ctx->gicr_propbaser);
gicr_write_pendbaser(gicr_base, rdist_ctx->gicr_pendbaser);