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fix(mediatek): use uppercase for definition

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Use uppercase for definition.
s/eDP_SEC_BASE/EDP_SEC_BASE/.
s/eDP_SEC_SIZE/EDP_SEC_SIZE/.

TEST=build pass for mt8195
BUG=b:233720142

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I390055500a6347b67fefde36a7f103438ba2d5ff
This commit is contained in:
Rex-BC Chen 2022-07-12 10:24:26 +08:00 • committed by Bo-Chen Chen
parent d150b6296e
commit 810d568141
3 changed files with 6 additions and 6 deletions
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2
plat/mediatek/drivers/dp/mt_dp.c
View file

@ -15,7 +15,7 @@
static uint32_t dp_write_sec_reg(uint32_t is_edp, uint32_t offset,
uint32_t value, uint32_t mask)
{
uint32_t reg = (is_edp != 0U) ? eDP_SEC_BASE : DP_SEC_BASE;
uint32_t reg = (is_edp != 0U) ? EDP_SEC_BASE : DP_SEC_BASE;
mmio_clrsetbits_32(reg + offset, mask, value);

4
plat/mediatek/mt8195/aarch64/platform_common.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2021-2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -19,7 +19,7 @@ const mmap_region_t plat_mmap[] = {
MT_DEVICE | MT_RW | MT_SECURE),
MAP_REGION_FLAT(DP_SEC_BASE, DP_SEC_SIZE,
MT_DEVICE | MT_RW | MT_SECURE),
MAP_REGION_FLAT(eDP_SEC_BASE, eDP_SEC_SIZE,
MAP_REGION_FLAT(EDP_SEC_BASE, EDP_SEC_SIZE,
MT_DEVICE | MT_RW | MT_SECURE),
MAP_REGION_FLAT(APUSYS_SCTRL_REVISER_BASE, APUSYS_SCTRL_REVISER_SIZE,
MT_DEVICE | MT_RW | MT_SECURE),

6
plat/mediatek/mt8195/include/platform_def.h
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2021-2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -48,9 +48,9 @@
/*******************************************************************************
* DP/eDP related constants
******************************************************************************/
#define eDP_SEC_BASE (IO_PHYS + 0x0C504000)
#define EDP_SEC_BASE (IO_PHYS + 0x0C504000)
#define DP_SEC_BASE (IO_PHYS + 0x0C604000)
#define eDP_SEC_SIZE 0x1000
#define EDP_SEC_SIZE 0x1000
#define DP_SEC_SIZE 0x1000
/*******************************************************************************