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Merge "FVP: Fix plat_set_nv_ctr() function" into integration
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commit
80a624d1a3
1 changed files with 16 additions and 14 deletions
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -8,39 +8,41 @@
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#include <stdint.h>
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#include <string.h>
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#include <lib/mmio.h>
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#include <plat/common/platform.h>
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#include <platform_def.h>
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#include <tools_share/tbbr_oid.h>
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/*
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* Store a new non-volatile counter value. On some FVP versions, the
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* non-volatile counters are RO. On these versions we expect the values in the
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* certificates to always match the RO values so that this function is never
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* called.
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* Store a new non-volatile counter value.
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*
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* On some FVP versions, the non-volatile counters are read-only so this
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* function will always fail.
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*
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* Return: 0 = success, Otherwise = error
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*/
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int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr)
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{
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const char *oid;
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uint32_t *nv_ctr_addr;
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uintptr_t nv_ctr_addr;
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assert(cookie != NULL);
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oid = (const char *)cookie;
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if (strcmp(oid, TRUSTED_FW_NVCOUNTER_OID) == 0) {
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nv_ctr_addr = (uint32_t *)TFW_NVCTR_BASE;
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nv_ctr_addr = TFW_NVCTR_BASE;
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} else if (strcmp(oid, NON_TRUSTED_FW_NVCOUNTER_OID) == 0) {
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nv_ctr_addr = (uint32_t *)NTFW_CTR_BASE;
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nv_ctr_addr = NTFW_CTR_BASE;
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} else {
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return 1;
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}
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*(unsigned int *)nv_ctr_addr = nv_ctr;
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mmio_write_32(nv_ctr_addr, nv_ctr);
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/* Verify that the current value is the one we just wrote. */
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if (nv_ctr != (unsigned int)(*nv_ctr_addr))
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return 1;
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return 0;
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/*
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* If the FVP models a locked counter then its value cannot be updated
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* and the above write operation has been silently ignored.
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*/
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return (mmio_read_32(nv_ctr_addr) == nv_ctr) ? 0 : 1;
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}
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