feat(el3-spmc): add a flag to enable support to load SEL0 SP

Introduce a build flag for enabling the support for loading SEL0 SP in
EL3 SPMC.

Signed-off-by: Nishant Sharma <nishant.sharma@arm.com>
Change-Id: I1d63ae4d0d8374a732113565be90d58861506e39
This commit is contained in:
Nishant Sharma 2023-06-27 00:36:01 +01:00
parent 1132f06885
commit 801cd3c84a
4 changed files with 33 additions and 0 deletions

View file

@ -152,6 +152,8 @@ SPMC located at S-EL1, S-EL2 or EL3:
exception level is set to S-EL1.
``SPMD_SPM_AT_SEL2`` is enabled. The context save/restore routine
and exhaustive list of registers is visible at `[4]`_.
- **SPMC_AT_EL3_SEL0_SP**: this option enables the support to load SEL0 SP
when SPMC at EL3 support is enabled.
- **SP_LAYOUT_FILE**: this option specifies a text description file
providing paths to SP binary images and manifests in DTS format
(see `Describing secure partitions`_). It
@ -257,6 +259,22 @@ Sample TF-A build command line when the SPMC is located at EL3:
PLAT=fvp \
all fip
Sample TF-A build command line when the SPMC is located at EL3 and SEL0 SP is
enabled:
.. code:: shell
make \
CROSS_COMPILE=aarch64-none-elf- \
SPD=spmd \
SPMD_SPM_AT_SEL2=0 \
SPMC_AT_EL3=1 \
SPMC_AT_EL3_SEL0_SP=1 \
BL32=<path-to-tee-binary> \
BL33=<path-to-bl33-binary> \
PLAT=fvp \
all fip
FVP model invocation
====================