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refactor(neoverse-rd): add defines for ROM, SRAM and DRAM2

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In the current setup, the base and size of the ROM, SRAM, and DRAM2
regions are directly defined in the nrd_fw_def2.h file for N2 CPU based
platforms. To enhance modularity and appropriateness, introduce macros
for these definitions in the respective css file (nrd_css_def2.h). While
the maximum sizes for ROM, SRAM, and DRAM2 are specified in the css
specification, the actual implementation sizes may vary. Consequently,
relocate the size macros to the platform-specific platform_def.h file
for individual platforms.

Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: I30988bf63cf942f68188a70697cc43cb6af96a9c
This commit is contained in:
Rohit Mathew 2024-02-26 20:35:51 +00:00
parent 947e78728e
commit 7f693bd993
3 changed files with 29 additions and 8 deletions
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9
plat/arm/board/neoverse_rd/common/include/nrd2/nrd_css_def2.h
View file

@ -14,6 +14,15 @@
* CSS memory map related defines
******************************************************************************/
/* Boot ROM */
#define NRD_CSS_SECURE_ROM_BASE UL(0x00000000)
/* DRAM2 */
#define NRD_CSS_DRAM2_BASE ULL(0x8080000000)
/* NS SRAM */
#define NRD_CSS_NS_SRAM_BASE UL(0x06000000)
/* PL011 UART */
#define NRD_CSS_SEC_UART_BASE UL(0x2A410000)
#define NRD_CSS_NSEC_UART_BASE UL(0x2A400000)

16
plat/arm/board/neoverse_rd/common/include/nrd2/nrd_plat_arm_def2.h
View file

@ -179,18 +179,18 @@ ENABLE_FEAT_RAS && FFH_SUPPORT
* ROM, SRAM and DRAM config
******************************************************************************/
#define PLAT_ARM_TRUSTED_ROM_BASE UL(0x00000000)
#define PLAT_ARM_TRUSTED_ROM_SIZE UL(0x00080000) /* 512KB */
#define PLAT_ARM_TRUSTED_ROM_BASE NRD_CSS_SECURE_ROM_BASE
#define PLAT_ARM_TRUSTED_ROM_SIZE NRD_CSS_SECURE_ROM_SIZE
#define PLAT_ARM_TRUSTED_SRAM_SIZE UL(0x00080000) /* 512 KB */
#define PLAT_ARM_NSTIMER_FRAME_ID UL(0)
#define PLAT_ARM_DRAM2_BASE NRD_CSS_DRAM2_BASE
#define PLAT_ARM_DRAM2_SIZE NRD_CSS_DRAM2_SIZE
#define PLAT_ARM_NSRAM_BASE UL(0x06000000)
#define PLAT_ARM_NSRAM_SIZE UL(0x00080000) /* 512KB */
#define PLAT_ARM_TRUSTED_SRAM_SIZE NRD_CSS_SECURE_SRAM_SIZE
#define PLAT_ARM_DRAM2_BASE ULL(0x8080000000)
#define PLAT_ARM_DRAM2_SIZE ULL(0x180000000) /* 6GB */
#define PLAT_ARM_NSTIMER_FRAME_ID 0
#define PLAT_ARM_NSRAM_BASE NRD_CSS_NS_SRAM_BASE
#define PLAT_ARM_NSRAM_SIZE NRD_CSS_NS_SRAM_SIZE
/*
* Required platform porting definitions common to all ARM CSS SoCs
*/

12
plat/arm/board/neoverse_rd/platform/rdn2/include/platform_def.h
View file

@ -29,6 +29,18 @@
#define NRD_MAX_CPUS_PER_CLUSTER U(1)
#define NRD_MAX_PE_PER_CPU U(1)
/* Boot ROM */
#define NRD_CSS_SECURE_ROM_SIZE UL(0x00080000) /* 512KB */
/* Secure SRAM */
#define NRD_CSS_SECURE_SRAM_SIZE UL(0x00080000) /* 512KB */
/* NS SRAM */
#define NRD_CSS_NS_SRAM_SIZE UL(0x00080000) /* 512KB */
/* DRAM2 */
#define NRD_CSS_DRAM2_SIZE ULL(0x180000000) /* 6GB */
#define PLAT_CSS_MHU_BASE UL(0x2A920000)
#define PLAT_MHUV2_BASE PLAT_CSS_MHU_BASE