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refactor(context mgmt): remove registers accessible only from secure state from EL2 context

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The following registers are only accessible from secure state,
therefore don't need to be saved/restored during world switch.
 - SDER32_EL2
 - VSTCR_EL2
 - VSTTBR_EL2

This patch removes these registers from EL2 context.

Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com>
Change-Id: I24d08aacb1b6def261c7b37d3e1265bb76adafdc
This commit is contained in:
Zelalem Aweke 2021-11-03 13:31:53 -05:00 • committed by Joanna Farley
parent 807d6d6217
commit 7f41bcc76d
2 changed files with 5 additions and 46 deletions
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13
include/lib/el3_runtime/aarch64/context.h
View file

@ -220,20 +220,17 @@
#define CTX_TTBR1_EL2 U(0x1a0) #define CTX_TTBR1_EL2 U(0x1a0)
#define CTX_VDISR_EL2 U(0x1a8) #define CTX_VDISR_EL2 U(0x1a8)
#define CTX_VSESR_EL2 U(0x1b0) #define CTX_VSESR_EL2 U(0x1b0)
#define CTX_VSTCR_EL2 U(0x1b8) #define CTX_VNCR_EL2 U(0x1b8)
#define CTX_VSTTBR_EL2 U(0x1c0) #define CTX_TRFCR_EL2 U(0x1c0)
#define CTX_SDER32_EL2 U(0x1c8)
#define CTX_VNCR_EL2 U(0x1d0)
#define CTX_TRFCR_EL2 U(0x1d8)
// Starting with Armv8.5 // Starting with Armv8.5
#define CTX_SCXTNUM_EL2 U(0x1e0) #define CTX_SCXTNUM_EL2 U(0x1c8)
// Register for FEAT_HCX // Register for FEAT_HCX
#define CTX_HCRX_EL2 U(0x1e8) #define CTX_HCRX_EL2 U(0x1d0)
/* Align to the next 16 byte boundary */ /* Align to the next 16 byte boundary */
#define CTX_EL2_SYSREGS_END U(0x1f0) #define CTX_EL2_SYSREGS_END U(0x1e0)
#endif /* CTX_INCLUDE_EL2_REGS */ #endif /* CTX_INCLUDE_EL2_REGS */

38
lib/el3_runtime/aarch64/context.S
View file

@ -188,25 +188,6 @@ func el2_sysregs_context_save
stp x11, x12, [x0, #CTX_VDISR_EL2] stp x11, x12, [x0, #CTX_VDISR_EL2]
#endif /* RAS_EXTENSION */ #endif /* RAS_EXTENSION */
#if ENABLE_FEAT_SEL2
/*
* VSTCR_EL2 and VSTTBR_EL2 registers are saved only
* when FEAT_SEL2 is supported.
*/
mrs x13, vstcr_el2
mrs x14, vsttbr_el2
stp x13, x14, [x0, #CTX_VSTCR_EL2]
#endif /* ENABLE_FEAT_SEL2 */
#if CTX_INCLUDE_AARCH32_REGS && ENABLE_FEAT_SEL2
/*
* SDER32_EL2 register is saved only when EL2 and EL1
* capable of using Aarch32 and FEAT_SEL2 is supported.
*/
mrs x15, sder32_el2
str x15, [x0, #CTX_SDER32_EL2]
#endif /* CTX_INCLUDE_AARCH32_REGS && ENABLE_FEAT_SEL2 */
#if CTX_INCLUDE_NEVE_REGS #if CTX_INCLUDE_NEVE_REGS
/* /*
* VNCR_EL2 register is saved only when FEAT_NV2 is supported. * VNCR_EL2 register is saved only when FEAT_NV2 is supported.
@ -401,25 +382,6 @@ func el2_sysregs_context_restore
msr vsesr_el2, x12 msr vsesr_el2, x12
#endif /* RAS_EXTENSION */ #endif /* RAS_EXTENSION */
#if ENABLE_FEAT_SEL2
/*
* VSTCR_EL2 and VSTTBR_EL2 registers are restored only when FEAT_SEL2
* is supported.
*/
ldp x13, x14, [x0, #CTX_VSTCR_EL2]
msr vstcr_el2, x13
msr vsttbr_el2, x14
#endif /* ENABLE_FEAT_SEL2 */
#if CTX_INCLUDE_AARCH32_REGS && ENABLE_FEAT_SEL2
/*
* SDER32_EL2 register is restored only when EL2 and EL1 capable of using
* Aarch32 and FEAT_SEL2 is supported.
*/
ldr x15, [x0, #CTX_SDER32_EL2]
msr sder32_el2, x15
#endif /* CTX_INCLUDE_AARCH32_REGS && ENABLE_FEAT_SEL2 */
#if CTX_INCLUDE_NEVE_REGS #if CTX_INCLUDE_NEVE_REGS
/* /*
* VNCR_EL2 register is restored only when FEAT_NV2 is supported. * VNCR_EL2 register is restored only when FEAT_NV2 is supported.