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refactor(context mgmt): remove registers accessible only from secure state from EL2 context
The following registers are only accessible from secure state, therefore don't need to be saved/restored during world switch. - SDER32_EL2 - VSTCR_EL2 - VSTTBR_EL2 This patch removes these registers from EL2 context. Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com> Change-Id: I24d08aacb1b6def261c7b37d3e1265bb76adafdc
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2 changed files with 5 additions and 46 deletions
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@ -220,20 +220,17 @@
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#define CTX_TTBR1_EL2 U(0x1a0)
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#define CTX_VDISR_EL2 U(0x1a8)
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#define CTX_VSESR_EL2 U(0x1b0)
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#define CTX_VSTCR_EL2 U(0x1b8)
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#define CTX_VSTTBR_EL2 U(0x1c0)
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#define CTX_SDER32_EL2 U(0x1c8)
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#define CTX_VNCR_EL2 U(0x1d0)
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#define CTX_TRFCR_EL2 U(0x1d8)
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#define CTX_VNCR_EL2 U(0x1b8)
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#define CTX_TRFCR_EL2 U(0x1c0)
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// Starting with Armv8.5
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#define CTX_SCXTNUM_EL2 U(0x1e0)
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#define CTX_SCXTNUM_EL2 U(0x1c8)
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// Register for FEAT_HCX
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#define CTX_HCRX_EL2 U(0x1e8)
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#define CTX_HCRX_EL2 U(0x1d0)
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/* Align to the next 16 byte boundary */
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#define CTX_EL2_SYSREGS_END U(0x1f0)
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#define CTX_EL2_SYSREGS_END U(0x1e0)
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#endif /* CTX_INCLUDE_EL2_REGS */
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@ -188,25 +188,6 @@ func el2_sysregs_context_save
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stp x11, x12, [x0, #CTX_VDISR_EL2]
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#endif /* RAS_EXTENSION */
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#if ENABLE_FEAT_SEL2
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/*
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* VSTCR_EL2 and VSTTBR_EL2 registers are saved only
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* when FEAT_SEL2 is supported.
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*/
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mrs x13, vstcr_el2
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mrs x14, vsttbr_el2
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stp x13, x14, [x0, #CTX_VSTCR_EL2]
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#endif /* ENABLE_FEAT_SEL2 */
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#if CTX_INCLUDE_AARCH32_REGS && ENABLE_FEAT_SEL2
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/*
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* SDER32_EL2 register is saved only when EL2 and EL1
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* capable of using Aarch32 and FEAT_SEL2 is supported.
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*/
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mrs x15, sder32_el2
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str x15, [x0, #CTX_SDER32_EL2]
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#endif /* CTX_INCLUDE_AARCH32_REGS && ENABLE_FEAT_SEL2 */
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#if CTX_INCLUDE_NEVE_REGS
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/*
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* VNCR_EL2 register is saved only when FEAT_NV2 is supported.
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@ -401,25 +382,6 @@ func el2_sysregs_context_restore
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msr vsesr_el2, x12
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#endif /* RAS_EXTENSION */
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#if ENABLE_FEAT_SEL2
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/*
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* VSTCR_EL2 and VSTTBR_EL2 registers are restored only when FEAT_SEL2
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* is supported.
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*/
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ldp x13, x14, [x0, #CTX_VSTCR_EL2]
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msr vstcr_el2, x13
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msr vsttbr_el2, x14
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#endif /* ENABLE_FEAT_SEL2 */
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#if CTX_INCLUDE_AARCH32_REGS && ENABLE_FEAT_SEL2
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/*
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* SDER32_EL2 register is restored only when EL2 and EL1 capable of using
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* Aarch32 and FEAT_SEL2 is supported.
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*/
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ldr x15, [x0, #CTX_SDER32_EL2]
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msr sder32_el2, x15
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#endif /* CTX_INCLUDE_AARCH32_REGS && ENABLE_FEAT_SEL2 */
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#if CTX_INCLUDE_NEVE_REGS
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/*
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* VNCR_EL2 register is restored only when FEAT_NV2 is supported.
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